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60 lines
1.3 KiB
C
60 lines
1.3 KiB
C
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/*
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* IR - Lightweight JIT Compilation Framework
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* (CPU framework for x86)
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* Copyright (C) 2023 by IR project.
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* Authors: Anatol Belski <anbelski@linux.microsoft.com>
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*/
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#include "ir.h"
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#if defined(IR_TARGET_X86) || defined(IR_TARGET_X64)
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#ifndef _WIN32
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IR_ALWAYS_INLINE void ir_cpuid_ex(uint32_t info[4], uint32_t function, uint32_t index)
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{
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asm volatile("cpuid"
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: "=a" (info[0]),
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"=b" (info[1]),
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"=c" (info[2]),
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"=d" (info[3])
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: "0" (function), "2" (index)
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: "memory");
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}
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IR_ALWAYS_INLINE void ir_cpuid(uint32_t info[4], uint32_t function)
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{
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ir_cpuid_ex(info, function, 0);
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}
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#else
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#define ir_cpuid_ex __cpuidex
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#define ir_cpuid __cpuid
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#endif
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/* Intel SDM Vol. 2A */
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uint32_t ir_cpuinfo(void)
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{
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uint32_t ret = 0;
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uint32_t info_0x1[4] = {0}, info_0x7_0[4] = {0};
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#define bit(mask, pos) (((mask) >> (pos)) & 1U)
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ir_cpuid(info_0x1, 0x1);
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if (bit(info_0x1[3], 26U)) ret |= IR_X86_SSE2;
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if (bit(info_0x1[2], 0U)) ret |= IR_X86_SSE3;
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if (bit(info_0x1[2], 9U)) ret |= IR_X86_SSSE3;
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if (bit(info_0x1[2], 19U)) ret |= IR_X86_SSE41;
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if (bit(info_0x1[2], 20U)) ret |= IR_X86_SSE42;
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if (bit(info_0x1[2], 28U)) ret |= IR_X86_AVX;
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ir_cpuid_ex(info_0x7_0, 0x7, 0);
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if (bit(info_0x7_0[1], 5U)) ret |= IR_X86_AVX2;
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#undef bit
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return ret;
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}
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#else
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uint32_t ir_cpuinfo(void)
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{
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return 0;
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}
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#endif /* IR_TARGET_X86 || IR_TARGET_X64 */
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