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21 lines
332 B
Plaintext
21 lines
332 B
Plaintext
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--TEST--
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015: Register Allocation (SHL + SHL + reuse/vreg hint)
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--TARGET--
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aarch64
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--ARGS--
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-S
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--CODE--
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{
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l_1 = START(l_4);
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uint32_t x = PARAM(l_1, "x", 1);
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uint32_t y = PARAM(l_1, "y", 2);
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uint32_t ret = SHL(x, y);
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uint32_t ret2 = SHL(y, ret);
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l_4 = RETURN(l_1, ret2);
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}
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--EXPECT--
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test:
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lsl w0, w0, w1
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lsl w0, w1, w0
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ret
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