2022-04-05 23:19:23 +02:00
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#include "ir.h"
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2022-05-27 12:18:04 +02:00
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#include "ir_private.h"
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void ir_consistency_check(void)
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{
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IR_ASSERT(IR_UNUSED == 0);
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IR_ASSERT(IR_NOP == 0);
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IR_ASSERT((int)IR_BOOL == (int)IR_C_BOOL);
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IR_ASSERT((int)IR_U8 == (int)IR_C_U8);
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IR_ASSERT((int)IR_U16 == (int)IR_C_U16);
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IR_ASSERT((int)IR_U32 == (int)IR_C_U32);
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IR_ASSERT((int)IR_U64 == (int)IR_C_U64);
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IR_ASSERT((int)IR_ADDR == (int)IR_C_ADDR);
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IR_ASSERT((int)IR_CHAR == (int)IR_C_CHAR);
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IR_ASSERT((int)IR_I8 == (int)IR_C_I8);
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IR_ASSERT((int)IR_I16 == (int)IR_C_I16);
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IR_ASSERT((int)IR_I32 == (int)IR_C_I32);
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IR_ASSERT((int)IR_I64 == (int)IR_C_I64);
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IR_ASSERT((int)IR_DOUBLE == (int)IR_C_DOUBLE);
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IR_ASSERT((int)IR_FLOAT == (int)IR_C_FLOAT);
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IR_ASSERT((IR_EQ ^ 1) == IR_NE);
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IR_ASSERT((IR_LT ^ 3) == IR_GT);
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IR_ASSERT((IR_GT ^ 3) == IR_LT);
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IR_ASSERT((IR_LE ^ 3) == IR_GE);
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IR_ASSERT((IR_GE ^ 3) == IR_LE);
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IR_ASSERT((IR_ULT ^ 3) == IR_UGT);
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IR_ASSERT((IR_UGT ^ 3) == IR_ULT);
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IR_ASSERT((IR_ULE ^ 3) == IR_UGE);
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IR_ASSERT((IR_UGE ^ 3) == IR_ULE);
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IR_ASSERT(IR_ADD + 1 == IR_SUB);
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}
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2022-04-05 23:19:23 +02:00
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2022-09-05 21:43:27 +02:00
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bool ir_check(ir_ctx *ctx)
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2022-04-05 23:19:23 +02:00
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{
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//TODO:
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2022-08-24 12:57:55 +02:00
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ir_ref i, j, n, *p, use;
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2022-09-02 08:50:38 +02:00
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ir_insn *insn, *use_insn;
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2022-08-24 12:57:55 +02:00
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uint32_t flags;
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bool ok = 1;
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for (i = IR_UNUSED + 1, insn = ctx->ir_base + i; i < ctx->insns_count;) {
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flags = ir_op_flags[insn->op];
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n = ir_input_edges_count(ctx, insn);
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for (j = 1, p = insn->ops + 1; j <= n; j++, p++) {
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use = *p;
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if (use != IR_UNUSED) {
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if (IR_IS_CONST_REF(use)) {
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if (use >= ctx->consts_count) {
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fprintf(stderr, "ir_base[%d].ops[%d] constant reference (%d) is out of range\n", i, j, use);
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ok = 0;
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}
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} else {
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if (use >= ctx->insns_count) {
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fprintf(stderr, "ir_base[%d].ops[%d] insn reference (%d) is out of range\n", i, j, use);
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ok = 0;
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}
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2022-09-02 08:50:38 +02:00
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use_insn = &ctx->ir_base[use];
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2022-08-24 12:57:55 +02:00
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switch (IR_OPND_KIND(flags, j)) {
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case IR_OPND_DATA:
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2022-09-02 08:50:38 +02:00
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if (use_insn->op == IR_VAR
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|| !(ir_op_flags[use_insn->op] & IR_OP_FLAG_DATA)) {
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if (!(ir_op_flags[use_insn->op] & IR_OP_FLAG_MEM)
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|| use_insn->type == IR_VOID) {
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2022-08-24 12:57:55 +02:00
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fprintf(stderr, "ir_base[%d].ops[%d] reference (%d) must be DATA\n", i, j, use);
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ok = 0;
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}
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}
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if (use >= i
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&& !(insn->op == IR_PHI && j > 2 && ctx->ir_base[insn->op1].op == IR_LOOP_BEGIN)) {
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fprintf(stderr, "ir_base[%d].ops[%d] invalid forward reference (%d)\n", i, j, use);
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ok = 0;
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}
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2022-09-02 08:50:38 +02:00
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if (flags & IR_OP_FLAG_DATA) {
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switch (insn->op) {
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case IR_COND:
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if (j == 1) {
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break;
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}
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case IR_ADD:
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case IR_SUB:
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case IR_MUL:
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case IR_DIV:
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case IR_MOD:
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case IR_NEG:
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case IR_ABS:
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case IR_ADD_OV:
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case IR_SUB_OV:
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case IR_MUL_OV:
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case IR_NOT:
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case IR_OR:
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case IR_AND:
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case IR_XOR:
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case IR_SHL:
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case IR_SHR:
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case IR_SAR:
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case IR_ROL:
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case IR_ROR:
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case IR_BSWAP:
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case IR_MIN:
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case IR_MAX:
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case IR_PHI:
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case IR_COPY:
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case IR_PI:
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if (insn->type != use_insn->type) {
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if (j == 2
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&& (insn->op == IR_SHL
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|| insn->op == IR_SHR
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|| insn->op == IR_SAR
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|| insn->op == IR_ROL
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|| insn->op == IR_ROR)
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&& ir_type_size[use_insn->type] < ir_type_size[insn->type]) {
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/* second argument of SHIFT may be incompatible with result */
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break;
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}
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fprintf(stderr, "ir_base[%d].ops[%d] (%d) type is incompatible with result type (%d != %d)\n",
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i, j, use, use_insn->type, insn->type);
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ok = 0;
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}
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break;
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}
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}
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2022-08-24 12:57:55 +02:00
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break;
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case IR_OPND_CONTROL:
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if (flags & IR_OP_FLAG_BB_START) {
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2022-09-02 08:50:38 +02:00
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if (!(ir_op_flags[use_insn->op] & IR_OP_FLAG_BB_END)) {
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2022-08-24 12:57:55 +02:00
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fprintf(stderr, "ir_base[%d].ops[%d] reference (%d) must be BB_END\n", i, j, use);
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ok = 0;
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}
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} else {
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2022-09-02 08:50:38 +02:00
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if (ir_op_flags[use_insn->op] & IR_OP_FLAG_BB_END) {
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2022-08-24 12:57:55 +02:00
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fprintf(stderr, "ir_base[%d].ops[%d] reference (%d) must not be BB_END\n", i, j, use);
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ok = 0;
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}
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}
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case IR_OPND_CONTROL_DEP:
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if (use >= i
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2022-09-13 11:44:59 +02:00
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&& !(insn->op == IR_LOOP_BEGIN)) {
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2022-08-24 12:57:55 +02:00
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fprintf(stderr, "ir_base[%d].ops[%d] invalid forward reference (%d)\n", i, j, use);
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ok = 0;
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}
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case IR_OPND_CONTROL_REF:
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2022-09-02 08:50:38 +02:00
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if (!(ir_op_flags[use_insn->op] & IR_OP_FLAG_CONTROL)) {
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2022-08-24 12:57:55 +02:00
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fprintf(stderr, "ir_base[%d].ops[%d] reference (%d) must be CONTROL\n", i, j, use);
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ok = 0;
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}
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break;
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case IR_OPND_VAR:
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if (ctx->ir_base[use].op != IR_VAR) {
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fprintf(stderr, "ir_base[%d].ops[%d] reference (%d) must be VAR\n", i, j, use);
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ok = 0;
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}
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if (use >= i) {
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fprintf(stderr, "ir_base[%d].ops[%d] invalid forward reference (%d)\n", i, j, use);
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ok = 0;
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}
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break;
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default:
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fprintf(stderr, "ir_base[%d].ops[%d] reference (%d) of unsupported kind\n", i, j, use);
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ok = 0;
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}
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}
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} else if ((insn->op == IR_RETURN || insn->op == IR_UNREACHABLE) && j == 2) {
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/* pass (function returns void) */
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} else if (insn->op == IR_BEGIN && j == 1) {
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/* pass (start of unreachable basic block) */
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2022-09-13 13:01:37 +02:00
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// } else if (insn->op == IR_LOOP_BEGIN || insn->op == IR_MERGE) {
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// /* TODO: something wrong ??? */
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2022-08-24 12:57:55 +02:00
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} else if (IR_OPND_KIND(flags, j) != IR_OPND_CONTROL_REF) {
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fprintf(stderr, "ir_base[%d].ops[%d] missing reference (%d)\n", i, j, use);
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ok = 0;
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}
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}
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2022-09-12 22:29:25 +02:00
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if (ctx->use_lists) {
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if ((flags & IR_OP_FLAG_CONTROL) && !(flags & IR_OP_FLAG_MEM)) {
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ir_use_list *use_list = &ctx->use_lists[i];
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ir_ref count;
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switch (insn->op) {
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case IR_SWITCH:
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/* may have many successors */
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break;
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case IR_IF:
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if (use_list->count != 2) {
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fprintf(stderr, "ir_base[%d].op (IF) must have 2 succesors (%d)\n", i, use_list->count);
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ok = 0;
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}
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break;
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case IR_UNREACHABLE:
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case IR_IJMP:
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if (use_list->count == 1) {
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/* UNREACHABLE and IJMP may be used in MERGE with the following ENTRY */
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break;
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}
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case IR_RETURN:
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if (use_list->count != 0) {
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fprintf(stderr, "ir_base[%d].op (%s) must not have successors (%d)\n",
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i, ir_op_name[insn->op], use_list->count);
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ok = 0;
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}
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break;
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default:
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/* skip data references */
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count = use_list->count;
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for (j = 0, p = &ctx->use_edges[use_list->refs]; j < use_list->count; j++, p++) {
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use = *p;
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if (!(ir_op_flags[ctx->ir_base[use].op] & IR_OP_FLAG_CONTROL)) {
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count--;
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}
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}
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if (count != 1) {
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if (insn->op == IR_CALL && count == 2) {
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/* result of CALL may be used as data in control instruction */
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break;
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}
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fprintf(stderr, "ir_base[%d].op (%s) must have 1 succesor (%d)\n",
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i, ir_op_name[insn->op], count);
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ok = 0;
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}
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break;
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}
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}
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}
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2022-08-24 12:57:55 +02:00
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n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
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i += n;
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insn += n;
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}
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IR_ASSERT(ok);
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2022-09-05 21:43:27 +02:00
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return ok;
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2022-04-05 23:19:23 +02:00
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}
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