ir/tests/aarch64/cond_004.irt

--TEST--
004: COND(D,D,D)
--TARGET--
aarch64
--ARGS--
-S
--CODE--
{
	l_1 = START(ret);
	double x = PARAM(l_1, "x", 1);
	double y = PARAM(l_1, "y", 2);
	double z = PARAM(l_1, "z", 3);
	double val = COND(x, y, z);
	ret = RETURN(l_1, val);
}
--EXPECT--
test:
	fcmp d0, #0.0
	fcsel d0, d1, d2, ne
	ret
Implemented code generation for COND (not optimized) 2023-10-13 19:50:23 +02:00			`--TEST--`
			`004: COND(D,D,D)`
			`--TARGET--`
			`aarch64`
			`--ARGS--`
			`-S`
			`--CODE--`
			`{`
			`l_1 = START(ret);`
			`double x = PARAM(l_1, "x", 1);`
			`double y = PARAM(l_1, "y", 2);`
			`double z = PARAM(l_1, "z", 3);`
			`double val = COND(x, y, z);`
			`ret = RETURN(l_1, val);`
			`}`
			`--EXPECT--`
			`test:`
			`fcmp d0, #0.0`
Fixed code generation for unordered floating point comparison - Fixed COND on AArch64 - Fixed SYM support on AArch64 2023-10-24 09:22:04 +02:00			`fcsel d0, d1, d2, ne`
Implemented code generation for COND (not optimized) 2023-10-13 19:50:23 +02:00			`ret`