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25 lines
407 B
Plaintext
25 lines
407 B
Plaintext
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--TEST--
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005: Register Allocation (DIV + DIV)
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--TARGET--
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x86
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--ARGS--
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-S
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--CODE--
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{
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l_1 = START(l_4);
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uint32_t x_1 = PARAM(l_1, "x", 1);
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uint32_t y_1 = PARAM(l_1, "y", 2);
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uint32_t z_1 = PARAM(l_1, "z", 3);
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uint32_t x_2 = DIV(x_1, y_1);
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uint32_t x_3 = DIV(x_2, z_1);
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l_4 = RETURN(l_1, x_3);
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}
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--EXPECT--
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test:
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movl 4(%esp), %eax
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xorl %edx, %edx
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divl 8(%esp)
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xorl %edx, %edx
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divl 0xc(%esp)
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retl
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