ir/tests/x86_64/conv_002.irt

--TEST--
002: type conversion ZEXT
--TARGET--
x86_64
--ARGS--
-S
--CODE--
{
	l_1 = START(l_4);
	uint32_t x = PARAM(l_1, "x", 1);
	uint64_t ret = ZEXT(x);
	l_4 = RETURN(l_1, ret);
}
--EXPECT--
test:
	movl %edi, %eax
	retq
Implement code generation for type conversion instructions Register constraints might need to be tweeked. 2022-05-20 13:07:41 +03:00			`--TEST--`
			`002: type conversion ZEXT`
Allow multi-target test suite 2022-05-25 17:38:22 +03:00			`--TARGET--`
			`x86_64`
Implement code generation for type conversion instructions Register constraints might need to be tweeked. 2022-05-20 13:07:41 +03:00			`--ARGS--`
			`-S`
			`--CODE--`
			`{`
			`l_1 = START(l_4);`
			`uint32_t x = PARAM(l_1, "x", 1);`
			`uint64_t ret = ZEXT(x);`
			`l_4 = RETURN(l_1, ret);`
			`}`
			`--EXPECT--`
			`test:`
			`movl %edi, %eax`
			`retq`