ir/tests/x86_64/add_011.irt

--TEST--
011: add function
--TARGET--
x86_64
--ARGS--
-S
--CODE--
{
	double c = 0.5;
	l_1 = START(l_4);
	double x = PARAM(l_1, "x", 1);
	double ret = ADD(x, c);
	l_4 = RETURN(l_1, ret);
}
--EXPECT--
test:
	addsd .L1(%rip), %xmm0
	retq
.rodata
	.db 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90
.L1:
	.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x3f
Add flexible support for temporary registers. Get rid of hardcoded temporary registers (incomplete) 2022-05-05 21:35:39 +02:00			`--TEST--`
			`011: add function`
Allow multi-target test suite 2022-05-25 16:38:22 +02:00			`--TARGET--`
			`x86_64`
Add flexible support for temporary registers. Get rid of hardcoded temporary registers (incomplete) 2022-05-05 21:35:39 +02:00			`--ARGS--`
			`-S`
			`--CODE--`
			`{`
			`double c = 0.5;`
			`l_1 = START(l_4);`
			`double x = PARAM(l_1, "x", 1);`
			`double ret = ADD(x, c);`
			`l_4 = RETURN(l_1, ret);`
			`}`
			`--EXPECT--`
			`test:`
Extend disassembler to support .rodata section and IP relative data labels 2022-05-26 00:17:02 +02:00			`addsd .L1(%rip), %xmm0`
Add flexible support for temporary registers. Get rid of hardcoded temporary registers (incomplete) 2022-05-05 21:35:39 +02:00			`retq`
Extend disassembler to support .rodata section and IP relative data labels 2022-05-26 00:17:02 +02:00			`.rodata`
			`.db 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90`
			`.L1:`
			`.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x3f`