2022-04-21 23:11:34 +02:00
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--TEST--
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SWITCH 001
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2022-05-25 16:38:22 +02:00
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--TARGET--
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x86_64
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2022-04-21 23:11:34 +02:00
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--ARGS--
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-S
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--CODE--
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{
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uintptr_t c_1 = 0;
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bool c_2 = 0;
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bool c_3 = 1;
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int32_t c_4 = 1;
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int32_t c_5 = 2;
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int32_t c_6 = 3;
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int32_t c_7 = 4;
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l_1 = START(l_16);
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int32_t d_2 = PARAM(l_1, "z", 0);
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l_4 = SWITCH(l_1, d_2);
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l_5 = CASE_VAL(l_4, c_4);
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int32_t x_1 = COPY(c_4);
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l_6 = END(l_5);
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l_7 = CASE_VAL(l_4, c_5);
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int32_t x_2 = COPY(c_5);
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l_8 = END(l_7);
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l_9 = CASE_VAL(l_4, c_6);
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int32_t x_3 = COPY(c_6);
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l_10 = END(l_9);
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l_11 = CASE_DEFAULT(l_4);
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int32_t x_4 = COPY(c_7);
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l_12 = END(l_11);
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l_13 = MERGE/4(l_6, l_8, l_10, l_12);
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int32_t ret = PHI/4(l_13, x_1, x_2, x_3, x_4);
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l_16 = RETURN(l_13, ret);
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}
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--EXPECT--
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test:
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cmpl $3, %edi
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2022-05-23 23:43:35 +02:00
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jg .L2
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2022-04-21 23:11:34 +02:00
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cmpl $1, %edi
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2022-05-23 23:43:35 +02:00
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jl .L2
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2022-04-21 23:11:34 +02:00
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movslq %edi, %rdi
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2022-05-06 09:00:19 +02:00
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leaq 0x24(%rip), %rax
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jmpq *-8(%rax, %rdi, 8)
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2022-04-21 23:11:34 +02:00
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movl $1, %eax
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2022-05-23 23:43:35 +02:00
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.L1:
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retq
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2022-04-21 23:11:34 +02:00
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movl $2, %eax
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2022-05-23 23:43:35 +02:00
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jmp .L1
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2022-04-21 23:11:34 +02:00
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movl $3, %eax
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2022-05-23 23:43:35 +02:00
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jmp .L1
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2022-04-21 23:11:34 +02:00
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.L2:
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2022-05-23 23:43:35 +02:00
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movl $4, %eax
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jmp .L1
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