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https://github.com/danog/ir.git
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Fixed support for both limits in llvm.sadd.sat and llvm.ssub.sat
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parent
a8e514266f
commit
0e421792ae
142
ir_load_llvm.c
142
ir_load_llvm.c
@ -553,24 +553,73 @@ static ir_ref llvm2ir_intrinsic(ir_ctx *ctx, LLVMValueRef insn, LLVMTypeRef ftyp
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type = llvm2ir_unsigned_type(type);
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return llvm2ir_binary_expr(ctx, IR_MUL_OV, type, insn);
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} else if (STR_START(name, name_len, "llvm.sadd.sat.")) {
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ir_ref ref, overflow;
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ir_ref ref, overflow, op0, op1, limit;
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ir_val val;
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IR_ASSERT(count == 2);
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type = llvm2ir_type(LLVMGetReturnType(ftype));
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IR_ASSERT(IR_IS_TYPE_INT(type));
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type = llvm2ir_signed_type(type);
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ref = llvm2ir_binary_expr(ctx, IR_ADD_OV, type, insn);
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overflow = ir_OVERFLOW(ref);
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// TODO: support for overflow in case of two negative values ???
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switch (ir_type_size[type]) {
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case 1: val.u64 = 0x7f; break;
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case 2: val.u64 = 0x7fff; break;
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case 4: val.u64 = 0x7fffffff; break;
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case 8: val.u64 = 0x7fffffffffffffff; break;
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default: IR_ASSERT(0);
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op0 = llvm2ir_op(ctx, LLVMGetOperand(insn, 0), type);
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op1 = llvm2ir_op(ctx, LLVMGetOperand(insn, 1), type);
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if (IR_IS_CONST_REF(op0)) {
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IR_ASSERT(ctx->ir_base[op0].type == type);
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if (ctx->ir_base[op0].val.i64 >= 0) {
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// positive_x + MIN -> y, positive_x + MAX = MAX
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switch (ir_type_size[type]) {
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case 1: val.u64 = 0x7f; break;
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case 2: val.u64 = 0x7fff; break;
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case 4: val.u64 = 0x7fffffff; break;
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case 8: val.u64 = 0x7fffffffffffffff; break;
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default: IR_ASSERT(0);
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}
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} else {
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// negative_x + MIN -> MIN, negative_x + MAX = y
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switch (ir_type_size[type]) {
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case 1: val.u64 = 0x80; break;
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case 2: val.u64 = 0x8000; break;
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case 4: val.u64 = 0x80000000; break;
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case 8: val.u64 = 0x8000000000000000; break;
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default: IR_ASSERT(0);
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}
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}
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limit = ir_const(ctx, val, type);
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} else if (IR_IS_CONST_REF(op1)) {
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IR_ASSERT(ctx->ir_base[op1].type == type);
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if (ctx->ir_base[op1].val.i64 >= 0) {
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// MIN + positive_x -> y, MAX + positive_x = MAX
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switch (ir_type_size[type]) {
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case 1: val.u64 = 0x7f; break;
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case 2: val.u64 = 0x7fff; break;
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case 4: val.u64 = 0x7fffffff; break;
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case 8: val.u64 = 0x7fffffffffffffff; break;
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default: IR_ASSERT(0);
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}
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} else {
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// MIN + negative_x -> MIN, MAX + negative_x = y
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switch (ir_type_size[type]) {
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case 1: val.u64 = 0x80; break;
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case 2: val.u64 = 0x8000; break;
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case 4: val.u64 = 0x80000000; break;
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case 8: val.u64 = 0x8000000000000000; break;
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default: IR_ASSERT(0);
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}
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}
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limit = ir_const(ctx, val, type);
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} else {
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ref = ir_SHR(type, op0, ir_const_u8(ctx, ir_type_size[type] * 8 - 1));
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switch (ir_type_size[type]) {
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case 1: val.u64 = 0x7f; break;
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case 2: val.u64 = 0x7fff; break;
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case 4: val.u64 = 0x7fffffff; break;
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case 8: val.u64 = 0x7fffffffffffffff; break;
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default: IR_ASSERT(0);
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}
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limit = ir_ADD(type, ref, ir_const(ctx, val, type));
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}
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return ir_COND(type, overflow, ir_const(ctx, val, type), ref);
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ref = ir_fold2(ctx, IR_OPT(IR_ADD_OV, type), op0, op1);
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overflow = ir_OVERFLOW(ref);
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return ir_COND(type, overflow, limit, ref);
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} else if (STR_START(name, name_len, "llvm.uadd.sat.")) {
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ir_ref ref, overflow;
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ir_val val;
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@ -590,24 +639,73 @@ static ir_ref llvm2ir_intrinsic(ir_ctx *ctx, LLVMValueRef insn, LLVMTypeRef ftyp
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}
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return ir_COND(type, overflow, ir_const(ctx, val, type), ref);
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} else if (STR_START(name, name_len, "llvm.ssub.sat.")) {
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ir_ref ref, overflow;
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ir_ref ref, overflow, op0, op1, limit;
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ir_val val;
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IR_ASSERT(count == 2);
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type = llvm2ir_type(LLVMGetReturnType(ftype));
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IR_ASSERT(IR_IS_TYPE_INT(type));
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type = llvm2ir_signed_type(type);
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ref = llvm2ir_binary_expr(ctx, IR_SUB_OV, type, insn);
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overflow = ir_OVERFLOW(ref);
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// TODO: support for overflow in case of two negative values ???
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switch (ir_type_size[type]) {
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case 1: val.u64 = 0x80; break;
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case 2: val.u64 = 0x8000; break;
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case 4: val.u64 = 0x80000000; break;
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case 8: val.u64 = 0x8000000000000000; break;
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default: IR_ASSERT(0);
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op0 = llvm2ir_op(ctx, LLVMGetOperand(insn, 0), type);
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op1 = llvm2ir_op(ctx, LLVMGetOperand(insn, 1), type);
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if (IR_IS_CONST_REF(op0)) {
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IR_ASSERT(ctx->ir_base[op0].type == type);
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if (ctx->ir_base[op0].val.i64 >= 0) {
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// positive_x - MIN -> MAX, positive_x - MAX = y
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switch (ir_type_size[type]) {
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case 1: val.u64 = 0x7f; break;
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case 2: val.u64 = 0x7fff; break;
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case 4: val.u64 = 0x7fffffff; break;
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case 8: val.u64 = 0x7fffffffffffffff; break;
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default: IR_ASSERT(0);
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}
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} else {
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// negative_x - MIN -> y, negative_x - MAX = MIN
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switch (ir_type_size[type]) {
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case 1: val.u64 = 0x80; break;
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case 2: val.u64 = 0x8000; break;
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case 4: val.u64 = 0x80000000; break;
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case 8: val.u64 = 0x8000000000000000; break;
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default: IR_ASSERT(0);
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}
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}
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limit = ir_const(ctx, val, type);
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} else if (IR_IS_CONST_REF(op1)) {
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IR_ASSERT(ctx->ir_base[op1].type == type);
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if (ctx->ir_base[op1].val.i64 >= 0) {
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// MIN - positive_x -> MIN, MAX - positive_x = y
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switch (ir_type_size[type]) {
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case 1: val.u64 = 0x80; break;
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case 2: val.u64 = 0x8000; break;
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case 4: val.u64 = 0x80000000; break;
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case 8: val.u64 = 0x8000000000000000; break;
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default: IR_ASSERT(0);
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}
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} else {
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// MIN - negative_x -> y, MAX - negative_x = MAX
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switch (ir_type_size[type]) {
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case 1: val.u64 = 0x7f; break;
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case 2: val.u64 = 0x7fff; break;
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case 4: val.u64 = 0x7fffffff; break;
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case 8: val.u64 = 0x7fffffffffffffff; break;
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default: IR_ASSERT(0);
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}
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}
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limit = ir_const(ctx, val, type);
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} else {
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ref = ir_SHR(type, op0, ir_const_u8(ctx, ir_type_size[type] * 8 - 1));
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switch (ir_type_size[type]) {
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case 1: val.u64 = 0x7f; break;
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case 2: val.u64 = 0x7fff; break;
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case 4: val.u64 = 0x7fffffff; break;
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case 8: val.u64 = 0x7fffffffffffffff; break;
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default: IR_ASSERT(0);
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}
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limit = ir_ADD(type, ref, ir_const(ctx, val, type));
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}
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return ir_COND(type, overflow, ir_const(ctx, val, type), ref);
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ref = ir_fold2(ctx, IR_OPT(IR_SUB_OV, type), op0, op1);
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overflow = ir_OVERFLOW(ref);
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return ir_COND(type, overflow, limit, ref);
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} else if (STR_START(name, name_len, "llvm.usub.sat.")) {
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ir_ref ref, overflow;
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ir_val val;
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