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https://github.com/danog/ir.git
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Add ir_insn_len() and ir_insn_inputs_to_len() private helpers
This commit is contained in:
parent
e01c43a967
commit
1749168078
4
ir.c
4
ir.c
@ -990,7 +990,7 @@ void ir_build_def_use_lists(ir_ctx *ctx)
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lists[def].count++;
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}
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}
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n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
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n = ir_insn_inputs_to_len(n);
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i += n;
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insn += n;
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}
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@ -1012,7 +1012,7 @@ void ir_build_def_use_lists(ir_ctx *ctx)
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edges[use_list->refs + use_list->count++] = i;
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}
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}
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n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
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n = ir_insn_inputs_to_len(n);
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i += n;
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insn += n;
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}
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@ -4670,8 +4670,7 @@ static void ir_allocate_unique_spill_slots(ir_ctx *ctx)
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}
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break;
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}
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n = ir_operands_count(ctx, insn);
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n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
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n = ir_insn_len(insn);
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i += n;
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insn += n;
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rule += n;
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@ -4735,8 +4734,7 @@ static void ir_preallocate_call_stack(ir_ctx *ctx, ir_backend_data *data)
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peak_call_stack_size = call_stack_size;
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}
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}
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n = ir_operands_count(ctx, insn);
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n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
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n = ir_insn_len(insn);
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i += n;
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insn += n;
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}
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@ -4911,8 +4909,7 @@ void *ir_emit_code(ir_ctx *ctx, size_t *size_ptr)
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}
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/* skip first instruction */
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n = ir_operands_count(ctx, insn);
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n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
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n = ir_insn_len(insn);
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i += n;
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insn += n;
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rule = ctx->rules + i;
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@ -5107,8 +5104,7 @@ void *ir_emit_code(ir_ctx *ctx, size_t *size_ptr)
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IR_ASSERT(0 && "NIY rule/insruction");
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break;
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}
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n = ir_operands_count(ctx, insn);
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n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
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n = ir_insn_len(insn);
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i += n;
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insn += n;
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rule += n;
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@ -339,7 +339,7 @@ bool ir_check(const ir_ctx *ctx)
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}
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}
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}
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n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
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n = ir_insn_inputs_to_len(n);
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i += n;
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insn += n;
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}
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@ -132,7 +132,7 @@ void ir_dump_dot(const ir_ctx *ctx, FILE *f)
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}
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}
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}
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n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
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n = ir_insn_inputs_to_len(n);
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i += n;
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insn += n;
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}
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@ -756,8 +756,7 @@ static int ir_emit_func(ir_ctx *ctx, FILE *f)
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return 0;
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}
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}
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n = ir_operands_count(ctx, insn);
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n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
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n = ir_insn_len(insn);
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i += n;
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insn += n;
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}
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@ -955,8 +954,7 @@ static int ir_emit_func(ir_ctx *ctx, FILE *f)
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default:
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IR_ASSERT(0 && "NIY instruction");
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}
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n = ir_operands_count(ctx, insn);
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n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
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n = ir_insn_len(insn);
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i += n;
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insn += n;
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}
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9
ir_gcm.c
9
ir_gcm.c
@ -529,7 +529,7 @@ int ir_schedule(ir_ctx *ctx)
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consts_count += ir_count_constant(used, insn->op2);
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}
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n = ir_input_edges_count(ctx, insn);
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insns_count += 1 + (n >> 2); // support for multi-word instructions like MERGE
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insns_count += ir_insn_inputs_to_len(n);
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i = _next[i];
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insn = &ctx->ir_base[i];
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/* Schedule PARAM, VAR, PI */
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@ -547,7 +547,7 @@ int ir_schedule(ir_ctx *ctx)
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ir_bitset_incl(scheduled, i);
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_xlat[i] = insns_count;
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/* Reuse "n" from MERGE and skip first input */
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insns_count += 1 + ((n + 1) >> 2); // support for multi-word instructions like PHI
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insns_count += ir_insn_inputs_to_len(n + 1);
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for (j = n, p = insn->ops + 2; j > 0; p++, j--) {
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input = *p;
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if (input < IR_TRUE) {
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@ -591,7 +591,7 @@ restart:
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}
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ir_bitset_incl(scheduled, i);
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_xlat[i] = insns_count;
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insns_count += 1 + (n >> 2); // support for multi-word instructions like CALL
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insns_count += ir_insn_inputs_to_len(n);
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i = _next[i];
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insn = &ctx->ir_base[i];
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}
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@ -830,8 +830,7 @@ void ir_build_prev_refs(ir_ctx *ctx)
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IR_ASSERT(!(bb->flags & IR_BB_UNREACHABLE));
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for (i = bb->start, insn = ctx->ir_base + i; i < bb->end;) {
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ctx->prev_ref[i] = prev;
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n = ir_operands_count(ctx, insn);
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n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
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n = ir_insn_len(insn);
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prev = i;
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i += n;
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insn += n;
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16
ir_private.h
16
ir_private.h
@ -842,6 +842,22 @@ IR_ALWAYS_INLINE ir_ref ir_input_edges_count(const ir_ctx *ctx, const ir_insn *i
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return n;
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}
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IR_ALWAYS_INLINE uint32_t ir_insn_inputs_to_len(uint32_t inputs_count)
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{
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return 1 + (inputs_count >> 2);
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}
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IR_ALWAYS_INLINE uint32_t ir_insn_len(const ir_insn *insn)
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{
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uint32_t flags = ir_op_flags[insn->op];
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uint32_t n = 1;
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if (UNEXPECTED(IR_OP_HAS_VAR_INPUTS(flags))) {
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/* MERGE, PHI, CALL, etc */
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n = ir_insn_inputs_to_len(insn->inputs_count);
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}
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return n;
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}
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/*** IR Binding ***/
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IR_ALWAYS_INLINE ir_ref ir_binding_find(const ir_ctx *ctx, ir_ref ref)
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{
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6
ir_ra.c
6
ir_ra.c
@ -57,8 +57,7 @@ static int ir_assign_virtual_registers_slow(ir_ctx *ctx)
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/* skip first instruction */
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insn = ctx->ir_base + i;
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n = ir_operands_count(ctx, insn);
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n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
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n = ir_insn_len(insn);
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i += n;
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insn += n;
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while (i < bb->end) {
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@ -69,8 +68,7 @@ static int ir_assign_virtual_registers_slow(ir_ctx *ctx)
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vregs[i] = ++vregs_count;
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}
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}
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n = ir_operands_count(ctx, insn);
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n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
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n = ir_insn_len(insn);
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i += n;
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insn += n;
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}
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@ -123,7 +123,7 @@ void ir_save(const ir_ctx *ctx, FILE *f)
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}
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}
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fprintf(f, "\n");
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n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
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n = ir_insn_inputs_to_len(n);
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i += n;
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insn += n;
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}
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12
ir_x86.dasc
12
ir_x86.dasc
@ -7716,8 +7716,7 @@ static void ir_allocate_unique_spill_slots(ir_ctx *ctx)
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}
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break;
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}
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n = ir_operands_count(ctx, insn);
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n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
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n = ir_insn_len(insn);
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i += n;
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insn += n;
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rule += n;
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@ -7778,8 +7777,7 @@ static void ir_preallocate_call_stack(ir_ctx *ctx, ir_backend_data *data)
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peak_call_stack_size = call_stack_size;
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}
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}
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n = ir_operands_count(ctx, insn);
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n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
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n = ir_insn_len(insn);
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i += n;
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insn += n;
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}
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@ -7984,8 +7982,7 @@ void *ir_emit_code(ir_ctx *ctx, size_t *size_ptr)
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}
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/* skip first instruction */
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n = ir_operands_count(ctx, insn);
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n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
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n = ir_insn_len(insn);
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i += n;
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insn += n;
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rule = ctx->rules + i;
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@ -8515,8 +8512,7 @@ void *ir_emit_code(ir_ctx *ctx, size_t *size_ptr)
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IR_ASSERT(0 && "NIY rule/insruction");
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break;
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}
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n = ir_operands_count(ctx, insn);
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n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
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n = ir_insn_len(insn);
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i += n;
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insn += n;
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rule += n;
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