danog/ir
1
0
Fork 0
mirror of https://github.com/danog/ir.git synced 2025-01-21 21:21:19 +01:00
Code Issues Packages Projects Releases Wiki Activity

Add ir_insn_len() and ir_insn_inputs_to_len() private helpers

Browse Source
This commit is contained in:
Dmitry Stogov 2023-04-21 13:40:55 +03:00
parent e01c43a967
commit 1749168078
10 changed files with 37 additions and 34 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
ir.c
View File

@ -990,7 +990,7 @@ void ir_build_def_use_lists(ir_ctx *ctx)
lists[def].count++; lists[def].count++;
} }
} }
n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI n = ir_insn_inputs_to_len(n);
i += n; i += n;
insn += n; insn += n;
} }
@ -1012,7 +1012,7 @@ void ir_build_def_use_lists(ir_ctx *ctx)
edges[use_list->refs + use_list->count++] = i; edges[use_list->refs + use_list->count++] = i;
} }
} }
n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI n = ir_insn_inputs_to_len(n);
i += n; i += n;
insn += n; insn += n;
} }

12
ir_aarch64.dasc
View File

@ -4670,8 +4670,7 @@ static void ir_allocate_unique_spill_slots(ir_ctx *ctx)
} }
break; break;
} }
n = ir_operands_count(ctx, insn); n = ir_insn_len(insn);
n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
i += n; i += n;
insn += n; insn += n;
rule += n; rule += n;
@ -4735,8 +4734,7 @@ static void ir_preallocate_call_stack(ir_ctx *ctx, ir_backend_data *data)
peak_call_stack_size = call_stack_size; peak_call_stack_size = call_stack_size;
} }
} }
n = ir_operands_count(ctx, insn); n = ir_insn_len(insn);
n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
i += n; i += n;
insn += n; insn += n;
} }
@ -4911,8 +4909,7 @@ void *ir_emit_code(ir_ctx *ctx, size_t *size_ptr)
} }
/* skip first instruction */ /* skip first instruction */
n = ir_operands_count(ctx, insn); n = ir_insn_len(insn);
n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
i += n; i += n;
insn += n; insn += n;
rule = ctx->rules + i; rule = ctx->rules + i;
@ -5107,8 +5104,7 @@ void *ir_emit_code(ir_ctx *ctx, size_t *size_ptr)
IR_ASSERT(0 && "NIY rule/insruction"); IR_ASSERT(0 && "NIY rule/insruction");
break; break;
} }
n = ir_operands_count(ctx, insn); n = ir_insn_len(insn);
n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
i += n; i += n;
insn += n; insn += n;
rule += n; rule += n;

2
ir_check.c
View File

@ -339,7 +339,7 @@ bool ir_check(const ir_ctx *ctx)
} }
} }
} }
n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI n = ir_insn_inputs_to_len(n);
i += n; i += n;
insn += n; insn += n;
} }

2
ir_dump.c
View File

@ -132,7 +132,7 @@ void ir_dump_dot(const ir_ctx *ctx, FILE *f)
} }
} }
} }
n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI n = ir_insn_inputs_to_len(n);
i += n; i += n;
insn += n; insn += n;
} }

6
ir_emit_c.c
View File

@ -756,8 +756,7 @@ static int ir_emit_func(ir_ctx *ctx, FILE *f)
return 0; return 0;
} }
} }
n = ir_operands_count(ctx, insn); n = ir_insn_len(insn);
n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
i += n; i += n;
insn += n; insn += n;
} }
@ -955,8 +954,7 @@ static int ir_emit_func(ir_ctx *ctx, FILE *f)
default: default:
IR_ASSERT(0 && "NIY instruction"); IR_ASSERT(0 && "NIY instruction");
} }
n = ir_operands_count(ctx, insn); n = ir_insn_len(insn);
n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
i += n; i += n;
insn += n; insn += n;
} }

9
ir_gcm.c
View File

@ -529,7 +529,7 @@ int ir_schedule(ir_ctx *ctx)
consts_count += ir_count_constant(used, insn->op2); consts_count += ir_count_constant(used, insn->op2);
} }
n = ir_input_edges_count(ctx, insn); n = ir_input_edges_count(ctx, insn);
insns_count += 1 + (n >> 2); // support for multi-word instructions like MERGE insns_count += ir_insn_inputs_to_len(n);
i = _next[i]; i = _next[i];
insn = &ctx->ir_base[i]; insn = &ctx->ir_base[i];
/* Schedule PARAM, VAR, PI */ /* Schedule PARAM, VAR, PI */
@ -547,7 +547,7 @@ int ir_schedule(ir_ctx *ctx)
ir_bitset_incl(scheduled, i); ir_bitset_incl(scheduled, i);
_xlat[i] = insns_count; _xlat[i] = insns_count;
/* Reuse "n" from MERGE and skip first input */ /* Reuse "n" from MERGE and skip first input */
insns_count += 1 + ((n + 1) >> 2); // support for multi-word instructions like PHI insns_count += ir_insn_inputs_to_len(n + 1);
for (j = n, p = insn->ops + 2; j > 0; p++, j--) { for (j = n, p = insn->ops + 2; j > 0; p++, j--) {
input = *p; input = *p;
if (input < IR_TRUE) { if (input < IR_TRUE) {
@ -591,7 +591,7 @@ restart:
} }
ir_bitset_incl(scheduled, i); ir_bitset_incl(scheduled, i);
_xlat[i] = insns_count; _xlat[i] = insns_count;
insns_count += 1 + (n >> 2); // support for multi-word instructions like CALL insns_count += ir_insn_inputs_to_len(n);
i = _next[i]; i = _next[i];
insn = &ctx->ir_base[i]; insn = &ctx->ir_base[i];
} }
@ -830,8 +830,7 @@ void ir_build_prev_refs(ir_ctx *ctx)
IR_ASSERT(!(bb->flags & IR_BB_UNREACHABLE)); IR_ASSERT(!(bb->flags & IR_BB_UNREACHABLE));
for (i = bb->start, insn = ctx->ir_base + i; i < bb->end;) { for (i = bb->start, insn = ctx->ir_base + i; i < bb->end;) {
ctx->prev_ref[i] = prev; ctx->prev_ref[i] = prev;
n = ir_operands_count(ctx, insn); n = ir_insn_len(insn);
n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
prev = i; prev = i;
i += n; i += n;
insn += n; insn += n;

16
ir_private.h
View File

@ -842,6 +842,22 @@ IR_ALWAYS_INLINE ir_ref ir_input_edges_count(const ir_ctx *ctx, const ir_insn *i
return n; return n;
} }
IR_ALWAYS_INLINE uint32_t ir_insn_inputs_to_len(uint32_t inputs_count)
{
return 1 + (inputs_count >> 2);
}
IR_ALWAYS_INLINE uint32_t ir_insn_len(const ir_insn *insn)
{
uint32_t flags = ir_op_flags[insn->op];
uint32_t n = 1;
if (UNEXPECTED(IR_OP_HAS_VAR_INPUTS(flags))) {
/* MERGE, PHI, CALL, etc */
n = ir_insn_inputs_to_len(insn->inputs_count);
}
return n;
}
/*** IR Binding ***/ /*** IR Binding ***/
IR_ALWAYS_INLINE ir_ref ir_binding_find(const ir_ctx *ctx, ir_ref ref) IR_ALWAYS_INLINE ir_ref ir_binding_find(const ir_ctx *ctx, ir_ref ref)
{ {

6
ir_ra.c
View File

@ -57,8 +57,7 @@ static int ir_assign_virtual_registers_slow(ir_ctx *ctx)
/* skip first instruction */ /* skip first instruction */
insn = ctx->ir_base + i; insn = ctx->ir_base + i;
n = ir_operands_count(ctx, insn); n = ir_insn_len(insn);
n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
i += n; i += n;
insn += n; insn += n;
while (i < bb->end) { while (i < bb->end) {
@ -69,8 +68,7 @@ static int ir_assign_virtual_registers_slow(ir_ctx *ctx)
vregs[i] = ++vregs_count; vregs[i] = ++vregs_count;
} }
} }
n = ir_operands_count(ctx, insn); n = ir_insn_len(insn);
n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
i += n; i += n;
insn += n; insn += n;
} }

2
ir_save.c
View File

@ -123,7 +123,7 @@ void ir_save(const ir_ctx *ctx, FILE *f)
} }
} }
fprintf(f, "\n"); fprintf(f, "\n");
n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI n = ir_insn_inputs_to_len(n);
i += n; i += n;
insn += n; insn += n;
} }

12
ir_x86.dasc
View File

@ -7716,8 +7716,7 @@ static void ir_allocate_unique_spill_slots(ir_ctx *ctx)
} }
break; break;
} }
n = ir_operands_count(ctx, insn); n = ir_insn_len(insn);
n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
i += n; i += n;
insn += n; insn += n;
rule += n; rule += n;
@ -7778,8 +7777,7 @@ static void ir_preallocate_call_stack(ir_ctx *ctx, ir_backend_data *data)
peak_call_stack_size = call_stack_size; peak_call_stack_size = call_stack_size;
} }
} }
n = ir_operands_count(ctx, insn); n = ir_insn_len(insn);
n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
i += n; i += n;
insn += n; insn += n;
} }
@ -7984,8 +7982,7 @@ void *ir_emit_code(ir_ctx *ctx, size_t *size_ptr)
} }
/* skip first instruction */ /* skip first instruction */
n = ir_operands_count(ctx, insn); n = ir_insn_len(insn);
n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
i += n; i += n;
insn += n; insn += n;
rule = ctx->rules + i; rule = ctx->rules + i;
@ -8515,8 +8512,7 @@ void *ir_emit_code(ir_ctx *ctx, size_t *size_ptr)
IR_ASSERT(0 && "NIY rule/insruction"); IR_ASSERT(0 && "NIY rule/insruction");
break; break;
} }
n = ir_operands_count(ctx, insn); n = ir_insn_len(insn);
n = 1 + (n >> 2); // support for multi-word instructions like MERGE and PHI
i += n; i += n;
insn += n; insn += n;
rule += n; rule += n;