From 18a3192604d9475cee833c6f94079d31015a9754 Mon Sep 17 00:00:00 2001
From: Dmitry Stogov <dmitry@zend.com>
Date: Wed, 22 Nov 2023 11:43:33 +0300
Subject: [PATCH] JIT/AArch64: Add code-generation for IR_TRAP

---
 ir_aarch64.dasc | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/ir_aarch64.dasc b/ir_aarch64.dasc
index 733534d..76b03eb 100644
--- a/ir_aarch64.dasc
+++ b/ir_aarch64.dasc
@@ -5320,6 +5320,9 @@ void *ir_emit_code(ir_ctx *ctx, size_t *size_ptr)
 				case IR_TLS:
 					ir_emit_tls(ctx, i, insn);
 					break;
+				case IR_TRAP:
+					|	brk;
+					break;
 				default:
 					IR_ASSERT(0 && "NIY rule/instruction");
 					dasm_free(&data.dasm_state);