diff --git a/ir_aarch64.dasc b/ir_aarch64.dasc
index 9a5df0f..95261e3 100644
--- a/ir_aarch64.dasc
+++ b/ir_aarch64.dasc
@@ -3066,7 +3066,7 @@ static void ir_emit_rload(ir_ctx *ctx, ir_ref def, ir_insn *insn)
 	if (IR_REGSET_IN(IR_REGSET_UNION(ctx->fixed_regset, IR_REGSET_FIXED), src_reg)) {
 		if (ctx->vregs[def]
 		 && ctx->live_intervals[ctx->vregs[def]]
-		 && ctx->live_intervals[ctx->vregs[def]]->top->stack_spill_pos != -1) {
+		 && ctx->live_intervals[ctx->vregs[def]]->stack_spill_pos != -1) {
 			ir_emit_store(ctx, type, def, src_reg);
 		}
 	} else {
@@ -4560,7 +4560,6 @@ static void ir_allocate_unique_spill_slots(ir_ctx *ctx)
 							} else {
 								ival->stack_spill_pos = ir_allocate_spill_slot(ctx, ival->type, &data->ra_data);
 							}
-							ival->top = ival;
 							if (insn->op == IR_VAR) {
 								ir_use_list *use_list = &ctx->use_lists[i];
 								ir_ref i, n, *p, use;
@@ -4581,7 +4580,6 @@ static void ir_allocate_unique_spill_slots(ir_ctx *ctx)
 											ival->reg = IR_REG_NONE;
 											ival->vreg = ctx->vregs[use];
 											ival->stack_spill_pos = stack_spill_pos;
-											ival->top = ival;
 										}
 									} else if (use_insn->op == IR_VSTORE) {
 										if (!IR_IS_CONST_REF(use_insn->op3)
@@ -4594,7 +4592,6 @@ static void ir_allocate_unique_spill_slots(ir_ctx *ctx)
 											ival->reg = IR_REG_NONE;
 											ival->vreg = ctx->vregs[insn->op3];
 											ival->stack_spill_pos = stack_spill_pos;
-											ival->top = ival;
 										}
 									}
 								}
diff --git a/ir_private.h b/ir_private.h
index fd0d1bd..0d62056 100644
--- a/ir_private.h
+++ b/ir_private.h
@@ -1009,6 +1009,7 @@ struct _ir_live_range {
 #define IR_LIVE_INTERVAL_REG_LOAD        (1<<7)
 #define IR_LIVE_INTERVAL_SPILL_SPECIAL   (1<<8) /* spill slot is pre-allocated in a special area (see ir_ctx.spill_reserved_base) */
 #define IR_LIVE_INTERVAL_SPILLED         (1<<9)
+#define IR_LIVE_INTERVAL_SPLIT_CHILD     (1<<10)
 
 struct _ir_live_interval {
 	uint8_t           type;
@@ -1026,7 +1027,6 @@ struct _ir_live_interval {
 	ir_live_range     range;
 	ir_live_range    *current_range;
 	ir_use_pos       *use_pos;
-	ir_live_interval *top;
 	ir_live_interval *next;
 	ir_live_interval *list_next; /* linked list of active, inactive or unhandled intervals */
 };
diff --git a/ir_ra.c b/ir_ra.c
index a1b5a1f..e7b90bb 100644
--- a/ir_ra.c
+++ b/ir_ra.c
@@ -132,8 +132,6 @@ static void ir_add_local_var(ir_ctx *ctx, int v, uint8_t type)
 	ival->range.end = ival->end = IR_END_LIVE_POS_FROM_REF(ctx->insns_count - 1);
 	ival->range.next = NULL;
 	ival->use_pos = NULL;
-
-	ival->top = ival;
 	ival->next = NULL;
 
 	ctx->live_intervals[v] = ival;
@@ -157,8 +155,6 @@ static ir_live_interval *ir_add_live_range(ir_ctx *ctx, int v, uint8_t type, ir_
 		ival->range.end = ival->end = end;
 		ival->range.next = NULL;
 		ival->use_pos = NULL;
-
-		ival->top = ival;
 		ival->next = NULL;
 
 		ctx->live_intervals[v] = ival;
@@ -258,8 +254,6 @@ static void ir_add_fixed_live_range(ir_ctx *ctx, ir_reg reg, ir_live_pos start,
 		ival->range.end = ival->end = end;
 		ival->range.next = NULL;
 		ival->use_pos = NULL;
-
-		ival->top = ival;
 		ival->next = NULL;
 
 		ctx->live_intervals[v] = ival;
@@ -297,7 +291,6 @@ static void ir_add_tmp(ir_ctx *ctx, ir_ref ref, ir_ref tmp_ref, int32_t tmp_op_n
 	ival->range.start = IR_START_LIVE_POS_FROM_REF(ref) + tmp_reg.start;
 	ival->range.end = ival->end = IR_START_LIVE_POS_FROM_REF(ref) + tmp_reg.end;
 	ival->range.next = NULL;
-	ival->top = NULL;
 	ival->use_pos = NULL;
 
 	if (!ctx->live_intervals[0]) {
@@ -1727,7 +1720,7 @@ static ir_live_interval *ir_split_interval_at(ir_ctx *ctx, ir_live_interval *iva
 	child = ir_arena_alloc(&ctx->arena, sizeof(ir_live_interval));
 	child->type = ival->type;
 	child->reg = IR_REG_NONE;
-	child->flags = 0;
+	child->flags = IR_LIVE_INTERVAL_SPLIT_CHILD;
 	child->vreg = ival->vreg;
 	child->stack_spill_pos = -1; // not allocated
 	child->range.start = pos;
@@ -1736,7 +1729,6 @@ static ir_live_interval *ir_split_interval_at(ir_ctx *ctx, ir_live_interval *iva
 	child->end = ival->end;
 	child->use_pos = prev_use_pos ? prev_use_pos->next : use_pos;
 
-	child->top = ival->top;
 	child->next = ival->next;
 	ival->next = child;
 
@@ -2087,9 +2079,9 @@ static ir_reg ir_try_allocate_free_reg(ir_ctx *ctx, ir_live_interval *ival, ir_l
 		}
 	}
 
-	if (ival->top && ival->top != ival) {
+	if (ival->flags & IR_LIVE_INTERVAL_SPLIT_CHILD) {
 		/* Try to reuse the register previously allocated for splited interval */
-		reg = ival->top->reg;
+		reg = ctx->live_intervals[ival->vreg]->reg;
 		if (reg >= 0
 		 && IR_REGSET_IN(available, reg)
 		 && ival->end <= freeUntilPos[reg]) {
@@ -2522,7 +2514,7 @@ static bool ir_ival_spill_for_fuse_load(ir_ctx *ctx, ir_live_interval *ival, ir_
 	ir_insn *insn;
 
 	if (ival->flags & IR_LIVE_INTERVAL_MEM_PARAM) {
-		IR_ASSERT(ival->top == ival && !ival->next && use_pos && use_pos->op_num == 0);
+		IR_ASSERT(!ival->next && use_pos && use_pos->op_num == 0);
 		insn = &ctx->ir_base[IR_LIVE_POS_TO_REF(use_pos->pos)];
 		IR_ASSERT(insn->op == IR_PARAM);
 		use_pos = use_pos->next;
@@ -2886,7 +2878,7 @@ static int ir_linear_scan(ir_ctx *ctx)
 static void assign_regs(ir_ctx *ctx)
 {
 	ir_ref i;
-	ir_live_interval *ival;
+	ir_live_interval *ival, *top_ival;
 	ir_use_pos *use_pos;
 	int8_t reg;
 	ir_ref ref;
@@ -2895,7 +2887,7 @@ static void assign_regs(ir_ctx *ctx)
 	memset(ctx->regs, IR_REG_NONE, sizeof(ir_regs) * ctx->insns_count);
 
 	for (i = 1; i <= ctx->vregs_count; i++) {
-		ival = ctx->live_intervals[i];
+		top_ival = ival = ctx->live_intervals[i];
 		if (ival) {
 			do {
 				if (ival->reg >= 0) {
@@ -2912,7 +2904,7 @@ static void assign_regs(ir_ctx *ctx)
 							/* load op1 directly into result (valid only when op1 register is not reused) */
 							ctx->regs[ref][1] = reg | IR_REG_SPILL_LOAD;
 						}
-						if (ival->top->flags & IR_LIVE_INTERVAL_SPILLED) {
+						if (top_ival->flags & IR_LIVE_INTERVAL_SPILLED) {
 							// TODO: Insert spill loads and stotres in optimal positons (resolution)
 
 							if (use_pos->op_num == 0) {
diff --git a/ir_x86.dasc b/ir_x86.dasc
index aef0c30..7d54495 100644
--- a/ir_x86.dasc
+++ b/ir_x86.dasc
@@ -5316,7 +5316,7 @@ static void ir_emit_rload(ir_ctx *ctx, ir_ref def, ir_insn *insn)
 	if (IR_REGSET_IN(IR_REGSET_UNION(ctx->fixed_regset, IR_REGSET_FIXED), src_reg)) {
 		if (ctx->vregs[def]
 		 && ctx->live_intervals[ctx->vregs[def]]
-		 && ctx->live_intervals[ctx->vregs[def]]->top->stack_spill_pos != -1) {
+		 && ctx->live_intervals[ctx->vregs[def]]->stack_spill_pos != -1) {
 			ir_emit_store(ctx, type, def, src_reg);
 		}
 	} else {
@@ -7592,7 +7592,6 @@ static void ir_allocate_unique_spill_slots(ir_ctx *ctx)
 							} else {
 								ival->stack_spill_pos = ir_allocate_spill_slot(ctx, ival->type, &data->ra_data);
 							}
-							ival->top = ival;
 							if (insn->op == IR_VAR) {
 								ir_use_list *use_list = &ctx->use_lists[i];
 								ir_ref i, n, *p, use;
@@ -7613,7 +7612,6 @@ static void ir_allocate_unique_spill_slots(ir_ctx *ctx)
 											ival->reg = IR_REG_NONE;
 											ival->vreg = ctx->vregs[use];
 											ival->stack_spill_pos = stack_spill_pos;
-											ival->top = ival;
 										}
 									} else if (use_insn->op == IR_VSTORE) {
 										if (!IR_IS_CONST_REF(use_insn->op3)
@@ -7626,7 +7624,6 @@ static void ir_allocate_unique_spill_slots(ir_ctx *ctx)
 											ival->reg = IR_REG_NONE;
 											ival->vreg = ctx->vregs[insn->op3];
 											ival->stack_spill_pos = stack_spill_pos;
-											ival->top = ival;
 										}
 									}
 								}