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Prefer 'ADD [addr], %r1' over 'mov [addr], %r1; lea [%r1, %r2], %r3'

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This commit is contained in:
Dmitry Stogov 2022-12-28 22:24:42 +03:00
parent e710f30170
commit 208e0040ae
3 changed files with 24 additions and 0 deletions
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4
ir_aarch64.dasc
View File

@ -897,6 +897,10 @@ binop_fp:
return insn->op;
}
static void ir_match_insn2(ir_ctx *ctx, ir_ref ref, ir_block *bb)
{
}
/* code genertion */
static int32_t ir_ref_spill_slot(ir_ctx *ctx, ir_ref ref, ir_reg *reg)
{

1
ir_emit.c
View File

@ -278,6 +278,7 @@ int ir_match(ir_ctx *ctx)
if (!ctx->rules[i]) {
ctx->rules[i] = ir_match_insn(ctx, i, bb);
}
ir_match_insn2(ctx, i, bb);
}
ctx->rules[i] = IR_SKIP;
}

19
ir_x86.dasc
View File

@ -1743,6 +1743,25 @@ store_int:
return insn->op;
}
static void ir_match_insn2(ir_ctx *ctx, ir_ref ref, ir_block *bb)
{
if (ctx->rules[ref] == IR_LEA_IB) {
ir_insn *insn = &ctx->ir_base[ref];
if (ctx->ir_base[insn->op2].op == IR_LOAD) {
ir_match_fuse_load(ctx, insn->op2, bb);
ctx->rules[ref] = IR_BINOP_INT;
} else if (ctx->ir_base[insn->op1].op == IR_LOAD) {
/* swap for better load fusion */
ir_ref tmp = insn->op1;
insn->op1 = insn->op2;
insn->op2 = tmp;
ir_match_fuse_load(ctx, insn->op2, bb);
ctx->rules[ref] = IR_BINOP_INT;
}
}
}
/* code genertion */
static int32_t ir_ref_spill_slot(ir_ctx *ctx, ir_ref ref, ir_reg *reg)
{