mirror of
https://github.com/danog/ir.git
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Add API to patch native code
This commit is contained in:
Dmitry Stogov
parent
edd7bc7101
commit
2dea40bfab
4
ir.h
4
ir.h
@ -610,6 +610,10 @@ int ir_emit_c(ir_ctx *ctx, FILE *f);
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bool ir_check(ir_ctx *ctx);
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void ir_consistency_check(void);
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/* Code patching (implementation in ir_patch.c) */
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int ir_patch(const void *code, size_t size, uint32_t jmp_table_size, const void *from_addr, const void *to_addr);
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/* IR Memmory Allocation */
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#ifndef ir_mem_malloc
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# define ir_mem_malloc malloc
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6
ir_gdb.c
6
ir_gdb.c
@ -11,12 +11,6 @@
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#include "ir_private.h"
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#include "ir_elf.h"
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#if defined(HAVE_ATTRIBUTE_ALIGNED)
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# define IR_SET_ALIGNED(alignment, decl) decl __attribute__ ((__aligned__ (alignment)))
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#else
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# define IR_SET_ALIGNED(alignment, decl) decl
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#endif
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/* DWARF definitions. */
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#define DW_CIE_VERSION 1
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262
ir_patch.c
Normal file
262
ir_patch.c
Normal file
@ -0,0 +1,262 @@
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#include "ir.h"
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#include "ir_private.h"
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#if defined(IR_TARGET_X86) || defined(IR_TARGET_X64)
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/* This taken from LuaJIT. Thanks to Mike Pall. */
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static uint32_t _asm_x86_inslen(const uint8_t* p)
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{
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static const uint8_t map_op1[256] = {
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0x92,0x92,0x92,0x92,0x52,0x45,0x51,0x51,0x92,0x92,0x92,0x92,0x52,0x45,0x51,0x20,
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0x92,0x92,0x92,0x92,0x52,0x45,0x51,0x51,0x92,0x92,0x92,0x92,0x52,0x45,0x51,0x51,
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0x92,0x92,0x92,0x92,0x52,0x45,0x10,0x51,0x92,0x92,0x92,0x92,0x52,0x45,0x10,0x51,
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0x92,0x92,0x92,0x92,0x52,0x45,0x10,0x51,0x92,0x92,0x92,0x92,0x52,0x45,0x10,0x51,
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#if defined(__x86_64__) || defined(_M_X64)
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0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x14,0x14,0x14,0x14,0x14,0x14,0x14,0x14,
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#else
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0x51,0x51,0x51,0x51,0x51,0x51,0x51,0x51,0x51,0x51,0x51,0x51,0x51,0x51,0x51,0x51,
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#endif
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0x51,0x51,0x51,0x51,0x51,0x51,0x51,0x51,0x51,0x51,0x51,0x51,0x51,0x51,0x51,0x51,
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0x51,0x51,0x92,0x92,0x10,0x10,0x12,0x11,0x45,0x86,0x52,0x93,0x51,0x51,0x51,0x51,
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0x52,0x52,0x52,0x52,0x52,0x52,0x52,0x52,0x52,0x52,0x52,0x52,0x52,0x52,0x52,0x52,
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0x93,0x86,0x93,0x93,0x92,0x92,0x92,0x92,0x92,0x92,0x92,0x92,0x92,0x92,0x92,0x92,
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0x51,0x51,0x51,0x51,0x51,0x51,0x51,0x51,0x51,0x51,0x47,0x51,0x51,0x51,0x51,0x51,
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#if defined(__x86_64__) || defined(_M_X64)
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0x59,0x59,0x59,0x59,0x51,0x51,0x51,0x51,0x52,0x45,0x51,0x51,0x51,0x51,0x51,0x51,
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#else
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0x55,0x55,0x55,0x55,0x51,0x51,0x51,0x51,0x52,0x45,0x51,0x51,0x51,0x51,0x51,0x51,
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#endif
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0x52,0x52,0x52,0x52,0x52,0x52,0x52,0x52,0x05,0x05,0x05,0x05,0x05,0x05,0x05,0x05,
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0x93,0x93,0x53,0x51,0x70,0x71,0x93,0x86,0x54,0x51,0x53,0x51,0x51,0x52,0x51,0x51,
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0x92,0x92,0x92,0x92,0x52,0x52,0x51,0x51,0x92,0x92,0x92,0x92,0x92,0x92,0x92,0x92,
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0x52,0x52,0x52,0x52,0x52,0x52,0x52,0x52,0x45,0x45,0x47,0x52,0x51,0x51,0x51,0x51,
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0x10,0x51,0x10,0x10,0x51,0x51,0x63,0x66,0x51,0x51,0x51,0x51,0x51,0x51,0x92,0x92
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};
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static const uint8_t map_op2[256] = {
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0x93,0x93,0x93,0x93,0x52,0x52,0x52,0x52,0x52,0x52,0x51,0x52,0x51,0x93,0x52,0x94,
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0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,
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0x53,0x53,0x53,0x53,0x53,0x53,0x53,0x53,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,
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0x52,0x52,0x52,0x52,0x52,0x52,0x52,0x52,0x34,0x51,0x35,0x51,0x51,0x51,0x51,0x51,
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0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,
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0x53,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,
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0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,
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0x94,0x54,0x54,0x54,0x93,0x93,0x93,0x52,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,
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0x46,0x46,0x46,0x46,0x46,0x46,0x46,0x46,0x46,0x46,0x46,0x46,0x46,0x46,0x46,0x46,
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0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,
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0x52,0x52,0x52,0x93,0x94,0x93,0x51,0x51,0x52,0x52,0x52,0x93,0x94,0x93,0x93,0x93,
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0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x94,0x93,0x93,0x93,0x93,0x93,
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0x93,0x93,0x94,0x93,0x94,0x94,0x94,0x93,0x52,0x52,0x52,0x52,0x52,0x52,0x52,0x52,
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0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,
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0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,
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0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x93,0x52
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};
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uint32_t result = 0;
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uint32_t prefixes = 0;
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uint32_t x = map_op1[*p];
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for (;;) {
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switch (x >> 4) {
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case 0:
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return result + x + (prefixes & 4);
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case 1:
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prefixes |= x;
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x = map_op1[*++p];
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result++;
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break;
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case 2:
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x = map_op2[*++p];
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break;
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case 3:
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p++;
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goto mrm;
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case 4:
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result -= (prefixes & 2);
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/* fallthrough */
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case 5:
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return result + (x & 15);
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case 6: /* Group 3. */
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if (p[1] & 0x38) {
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x = 2;
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} else if ((prefixes & 2) && (x == 0x66)) {
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x = 4;
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}
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goto mrm;
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case 7: /* VEX c4/c5. */
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#if !defined(__x86_64__) && !defined(_M_X64)
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if (p[1] < 0xc0) {
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x = 2;
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goto mrm;
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}
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#endif
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if (x == 0x70) {
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x = *++p & 0x1f;
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result++;
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if (x >= 2) {
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p += 2;
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result += 2;
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goto mrm;
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}
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}
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p++;
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result++;
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x = map_op2[*++p];
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break;
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case 8:
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result -= (prefixes & 2);
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/* fallthrough */
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case 9:
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mrm:
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/* ModR/M and possibly SIB. */
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result += (x & 15);
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x = *++p;
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switch (x >> 6) {
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case 0:
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if ((x & 7) == 5) {
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return result + 4;
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}
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break;
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case 1:
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result++;
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break;
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case 2:
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result += 4;
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break;
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case 3:
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return result;
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}
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if ((x & 7) == 4) {
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result++;
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if (x < 0x40 && (p[1] & 7) == 5) {
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result += 4;
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}
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}
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return result;
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}
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}
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}
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typedef IR_SET_ALIGNED(1, uint16_t unaligned_uint16_t);
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typedef IR_SET_ALIGNED(1, int32_t unaligned_int32_t);
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static int ir_patch_code(const void *code, size_t size, const void *from_addr, const void *to_addr)
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{
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int ret = 0;
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uint8_t *p, *end;
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p = (uint8_t*)code;
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end = p + size - 5;
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while (p < end) {
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if ((*(unaligned_uint16_t*)p & 0xf0ff) == 0x800f && p + *(unaligned_int32_t*)(p+2) == (uint8_t*)from_addr - 6) {
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*(unaligned_int32_t*)(p+2) = ((uint8_t*)to_addr - (p + 6));
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ret++;
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} else if (*p == 0xe9 && p + *(unaligned_int32_t*)(p+1) == (uint8_t*)from_addr - 5) {
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*(unaligned_int32_t*)(p+1) = ((uint8_t*)to_addr - (p + 5));
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ret++;
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}
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p += _asm_x86_inslen(p);
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}
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if (ret) {
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ir_mem_flush((void*)code, size);
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}
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return ret;
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}
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#elif defined(IR_TARGET_AARCH64)
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static int ir_patch_code(const void *code, size_t size, const void *from_addr, const void *to_addr)
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{
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int ret = 0;
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uint8_t *p, *end;
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const void *veneer = NULL;
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ptrdiff_t delta;
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end = (uint8_t*)code;
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p = end + size;
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while (p > end) {
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uint32_t *ins_ptr;
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uint32_t ins;
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p -= 4;
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ins_ptr = (uint32_t*)p;
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ins = *ins_ptr;
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if ((ins & 0xfc000000u) == 0x14000000u) {
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// B (imm26:0..25)
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delta = (uint32_t*)from_addr - ins_ptr;
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if (((ins ^ (uint32_t)delta) & 0x01ffffffu) == 0) {
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delta = (uint32_t*)to_addr - ins_ptr;
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if (((delta + 0x02000000) >> 26) != 0) {
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abort(); // branch target out of range
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}
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*ins_ptr = (ins & 0xfc000000u) | ((uint32_t)delta & 0x03ffffffu);
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ret++;
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if (!veneer) {
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veneer = p;
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}
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}
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} else if ((ins & 0xff000000u) == 0x54000000u ||
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(ins & 0x7e000000u) == 0x34000000u) {
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// B.cond, CBZ, CBNZ (imm19:5..23)
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delta = (uint32_t*)from_addr - ins_ptr;
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if (((ins ^ ((uint32_t)delta << 5)) & 0x00ffffe0u) == 0) {
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delta = (uint32_t*)to_addr - ins_ptr;
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if (((delta + 0x40000) >> 19) != 0) {
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if (veneer) {
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delta = (uint32_t*)veneer - ins_ptr;
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if (((delta + 0x40000) >> 19) != 0) {
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abort(); // branch target out of range
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}
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} else {
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abort(); // branch target out of range
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}
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}
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*ins_ptr = (ins & 0xff00001fu) | (((uint32_t)delta & 0x7ffffu) << 5);
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ret++;
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}
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} else if ((ins & 0x7e000000u) == 0x36000000u) {
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// TBZ, TBNZ (imm14:5..18)
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delta = (uint32_t*)from_addr - ins_ptr;
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if (((ins ^ ((uint32_t)delta << 5)) & 0x0007ffe0u) == 0) {
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delta = (uint32_t*)to_addr - ins_ptr;
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if (((delta + 0x2000) >> 14) != 0) {
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if (veneer) {
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delta = (uint32_t*)veneer - ins_ptr;
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if (((delta + 0x2000) >> 14) != 0) {
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abort(); // branch target out of range
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}
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} else {
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abort(); // branch target out of range
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}
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}
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*ins_ptr = (ins & 0xfff8001fu) | (((uint32_t)delta & 0x3fffu) << 5);
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ret++;
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}
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}
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}
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if (ret) {
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ir_mem_flush((void*)code, size);
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}
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return ret;
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}
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#endif
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int ir_patch(const void *code, size_t size, uint32_t jmp_table_size, const void *from_addr, const void *to_addr)
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{
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int ret = 0;
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if (jmp_table_size) {
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const void **jmp_slot = (const void **)((char*)code + IR_ALIGNED_SIZE(size, sizeof(void*)));
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do {
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if (*jmp_slot == from_addr) {
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*jmp_slot = to_addr;
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ret++;
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}
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jmp_slot++;
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} while (--jmp_table_size);
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}
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ret += ir_patch_code(code, size, from_addr, to_addr);
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return ret;
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}
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@ -21,6 +21,11 @@
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# if __has_attribute(noinline)
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# define IR_NEVER_INLINE __attribute__((noinline))
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# endif
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# if __has_attribute(__aligned__)
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# define IR_SET_ALIGNED(alignment, decl) decl __attribute__ ((__aligned__ (alignment)))
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# endif
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#elif defined(_WIN32)
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# define IR_SET_ALIGNED(alignment, decl) __declspec(align(alignment)) decl
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#endif
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#ifndef EXPECTED
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# define EXPECTED(condition) (condition)
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@ -32,6 +37,9 @@
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#ifndef IR_NEVER_INLINE
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# define IR_NEVER_INLINE
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#endif
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#ifndef IR_SET_ALIGNED
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# define IR_SET_ALIGNED(alignment, decl) decl
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#endif
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/*** Helper routines ***/
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@ -2,14 +2,6 @@
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#include "ir_x86.h"
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#include "ir_private.h"
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#ifdef _WIN32
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# define IR_SET_ALIGNED(alignment, decl) __declspec(align(alignment)) decl
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#elif defined(HAVE_ATTRIBUTE_ALIGNED)
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# define IR_SET_ALIGNED(alignment, decl) decl __attribute__ ((__aligned__ (alignment)))
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#else
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# define IR_SET_ALIGNED(alignment, decl) decl
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#endif
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#define DASM_M_GROW(ctx, t, p, sz, need) \
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do { \
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size_t _sz = (sz), _need = (need); \
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