diff --git a/ir_x86.dasc b/ir_x86.dasc
index 1a28fd2..cdaf48d 100644
--- a/ir_x86.dasc
+++ b/ir_x86.dasc
@@ -1844,17 +1844,19 @@ static void ir_emit_load_imm_int(ir_ctx *ctx, ir_type type, ir_reg reg, int64_t
 	dasm_State **Dst = &data->dasm_state;
 
 	IR_ASSERT(IR_IS_TYPE_INT(type));
-	if (ir_type_size[type] == 8 && !IR_IS_SIGNED_32BIT(val)) {
+	if (val == 0) {
+		|	ASM_REG_REG_OP xor, type, reg, reg
+	} else if (ir_type_size[type] == 8) {
 		IR_ASSERT(sizeof(void*) == 8);
 |.if X64
 		if (IR_IS_UNSIGNED_32BIT(val)) {
 			|	mov Rd(reg), (uint32_t)val // zero extended load
+		} else if (IR_IS_SIGNED_32BIT(val)) {
+			|	mov Rq(reg), (int32_t)val // sign extended load
 		} else {
 			|	mov64 Ra(reg), val
 		}
 |.endif
-	} else if (val == 0) {
-		|	ASM_REG_REG_OP xor, type, reg, reg
 	} else {
 		|	ASM_REG_IMM_OP mov, type, reg, (int32_t)val // sign extended load
 	}
diff --git a/tests/debug/args_001.irt b/tests/debug/args_001.irt
index 13c2120..84bb2aa 100644
--- a/tests/debug/args_001.irt
+++ b/tests/debug/args_001.irt
@@ -26,10 +26,10 @@ x86_64
 test:
 	subq $0x28, %rsp
 	leaq .L1(%rip), %rdi
-	movq $1, %rsi
+	movl $1, %esi
 	movw $2, %dx
 	movl $3, %ecx
-	movq $4, %r8
+	movl $4, %r8d
 	movabsq $0x100000000, %r9
 	movl $6, (%rsp)
 	movl $7, 8(%rsp)
@@ -42,7 +42,7 @@ test:
 	addq $0x28, %rsp
 	retq
 .rodata
-	.db 0x90, 0x90, 0x90, 0x90
+	.db 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90
 .L1:
 	.db 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x6c, 0x6c, 0x64, 0x20, 0x30, 0x78
 	.db 0x25, 0x6c, 0x6c, 0x78, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x6c
diff --git a/tests/debug/sccp_001.irt b/tests/debug/sccp_001.irt
index 7d7e94e..5b820ae 100644
--- a/tests/debug/sccp_001.irt
+++ b/tests/debug/sccp_001.irt
@@ -14,6 +14,6 @@ x86_64
 }
 --EXPECT--
 test:
-	movq $0xa, %rax
+	movl $0xa, %eax
 	bswapq %rax
 	retq