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https://github.com/danog/ir.git
synced 2025-01-21 21:21:19 +01:00
Fix stack parameters loading
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parent
da5de8a390
commit
4e917faaba
19
ir_x86.dasc
19
ir_x86.dasc
@ -3956,12 +3956,11 @@ static int ir_emit_dessa_move(ir_ctx *ctx, uint8_t type, ir_ref from, ir_ref to)
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return 1;
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}
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static void ir_emit_param_move(ir_ctx *ctx, uint8_t type, ir_reg from_reg, ir_reg to_reg, ir_ref to)
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static void ir_emit_param_move(ir_ctx *ctx, uint8_t type, ir_reg from_reg, ir_reg to_reg, ir_ref to, int32_t offset)
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{
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ir_backend_data *data = ctx->data;
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dasm_State **Dst = &data->dasm_state;
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ir_reg fp = (ctx->flags & IR_USE_FRAME_POINTER) ? IR_REG_RBP : IR_REG_RSP;
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int32_t offset;
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IR_ASSERT(from_reg != IR_REG_NONE || to_reg != IR_REG_NONE);
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@ -3973,7 +3972,6 @@ static void ir_emit_param_move(ir_ctx *ctx, uint8_t type, ir_reg from_reg, ir_re
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ir_emit_store(ctx, type, to, from_reg);
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}
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} else {
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offset = (ctx->flags & IR_USE_FRAME_POINTER) ? -8 : -8; // TODO:
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| ASM_REG_MEM_OP mov, type, to_reg, [Ra(fp)+offset]
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}
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} else {
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@ -3984,7 +3982,6 @@ static void ir_emit_param_move(ir_ctx *ctx, uint8_t type, ir_reg from_reg, ir_re
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ir_emit_store(ctx, type, to, from_reg);
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}
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} else {
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offset = (ctx->flags & IR_USE_FRAME_POINTER) ? -8 : -8; // TODO:
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| ASM_FP_REG_MEM_OP movss, movsd, vmovss, vmovsd, type, to_reg, [Ra(fp)+offset]
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}
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}
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@ -3992,6 +3989,7 @@ static void ir_emit_param_move(ir_ctx *ctx, uint8_t type, ir_reg from_reg, ir_re
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static void ir_emit_load_params(ir_ctx *ctx)
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{
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ir_backend_data *data = ctx->data;
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ir_use_list *use_list = &ctx->use_lists[1];
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ir_insn *insn;
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ir_ref i, n, *p, use;
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@ -4004,7 +4002,13 @@ static void ir_emit_load_params(ir_ctx *ctx)
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int fp_reg_params_count = IR_REG_FP_ARGS;
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const int8_t *int_reg_params = _ir_int_reg_params;
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const int8_t *fp_reg_params = _ir_fp_reg_params;
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int32_t stack_offset = 0;
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if (ctx->flags & IR_USE_FRAME_POINTER) {
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stack_offset = sizeof(void*); /* skip old frame pointer */
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} else {
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stack_offset = data->stack_frame_size + data->stack_frame_alignment;
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}
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n = use_list->count;
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for (i = 0, p = &ctx->use_edges[use_list->refs]; i < n; i++, p++) {
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use = *p;
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@ -4015,23 +4019,22 @@ static void ir_emit_load_params(ir_ctx *ctx)
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if (int_param_num < int_reg_params_count) {
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src_reg = int_reg_params[int_param_num];
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} else {
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// TODO: replace IR_REG_NONE by stack slot
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src_reg = IR_REG_NONE;
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stack_offset += sizeof(void*);
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}
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int_param_num++;
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} else {
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if (fp_param_num < fp_reg_params_count) {
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src_reg = fp_reg_params[fp_param_num];
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} else {
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// TODO: replace IR_REG_NONE by stack slot
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src_reg = IR_REG_NONE;
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stack_offset += sizeof(void*);
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}
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fp_param_num++;
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}
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dst_reg = IR_REG_NUM(ctx->regs[use][0]);
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if (src_reg != dst_reg) {
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// TODO: parallel move
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ir_emit_param_move(ctx, insn->type, src_reg, dst_reg, use);
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ir_emit_param_move(ctx, insn->type, src_reg, dst_reg, use, stack_offset);
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}
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if (dst_reg != IR_REG_NONE && (ctx->regs[use][0] & IR_REG_SPILL_STORE)) {
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ir_emit_store(ctx, insn->type, use, dst_reg);
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@ -72,13 +72,13 @@ test:
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movl %edx, 8(%rsp)
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movl %ecx, 0xc(%rsp)
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movl %r9d, 0x10(%rsp)
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movl -8(%rsp), %eax
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movl 0xa0(%rsp), %eax
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movl %eax, 0x14(%rsp)
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movl -8(%rsp), %eax
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movl 0xa8(%rsp), %eax
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movl %eax, 0x18(%rsp)
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movl -8(%rsp), %eax
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movl 0xb0(%rsp), %eax
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movl %eax, 0x1c(%rsp)
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movl -8(%rsp), %eax
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movl 0xb8(%rsp), %eax
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movl %eax, 0x20(%rsp)
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movl (%rsp), %eax
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movl %eax, 0x24(%rsp)
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@ -69,10 +69,10 @@ test:
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subq $0x10, %rsp
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movq %rbx, 8(%rsp)
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movq %rbp, (%rsp)
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movl -8(%rsp), %eax
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movl -8(%rsp), %r8d
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movl -8(%rsp), %r10d
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movl -8(%rsp), %r11d
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movl 0x18(%rsp), %eax
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movl 0x20(%rsp), %r8d
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movl 0x28(%rsp), %r10d
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movl 0x30(%rsp), %r11d
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movl %edx, %ebx
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imull %esi, %ebx
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leal 4(%rbx), %ebp
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48
tests/debug/params_001.irt
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48
tests/debug/params_001.irt
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@ -0,0 +1,48 @@
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--TEST--
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001: Parameter Loading
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--ARGS--
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-S
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--CODE--
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{
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l_1 = START(l_2);
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int32_t p_1 = PARAM(l_1, "p_1", 1);
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int32_t p_2 = PARAM(l_1, "p_2", 1);
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int32_t p_3 = PARAM(l_1, "p_3", 1);
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int32_t p_4 = PARAM(l_1, "p_4", 1);
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int32_t p_5 = PARAM(l_1, "p_5", 1);
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int32_t p_6 = PARAM(l_1, "p_6", 1);
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int32_t p_7 = PARAM(l_1, "p_7", 1);
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int32_t p_8 = PARAM(l_1, "p_8", 1);
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int32_t p_9 = PARAM(l_1, "p_9", 1);
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int32_t p_10 = PARAM(l_1, "p_10", 1);
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int32_t r1 = ADD(p_1, p_2);
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int32_t r2 = ADD(r1, p_3);
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int32_t r3 = ADD(r2, p_4);
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int32_t r4 = ADD(r3, p_5);
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int32_t r5 = ADD(r4, p_6);
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int32_t r6 = ADD(r5, p_7);
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int32_t r7 = ADD(r6, p_8);
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int32_t r8 = ADD(r7, p_9);
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int32_t ret = SUB(r8, p_10);
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l_2 = RETURN(l_1, ret);
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}
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--EXPECT--
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test:
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subq $8, %rsp
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movq %rbx, (%rsp)
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movl 0x10(%rsp), %eax
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movl 0x18(%rsp), %r10d
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movl 0x20(%rsp), %r11d
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movl 0x28(%rsp), %ebx
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leal (%rsi, %rdi), %esi
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leal (%rsi, %rdx), %edx
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leal (%rdx, %rcx), %ecx
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leal (%rcx, %r8), %ecx
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leal (%rcx, %r9), %ecx
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leal (%rcx, %rax), %eax
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leal (%rax, %r10), %eax
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leal (%rax, %r11), %eax
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subl %ebx, %eax
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movq (%rsp), %rbx
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addq $8, %rsp
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retq
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43
tests/debug/params_002.irt
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43
tests/debug/params_002.irt
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@ -0,0 +1,43 @@
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--TEST--
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002: Parameter Loading
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--ARGS--
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-S
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--CODE--
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{
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l_1 = START(l_2);
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double p_1 = PARAM(l_1, "p_1", 1);
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double p_2 = PARAM(l_1, "p_2", 1);
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double p_3 = PARAM(l_1, "p_3", 1);
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double p_4 = PARAM(l_1, "p_4", 1);
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double p_5 = PARAM(l_1, "p_5", 1);
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double p_6 = PARAM(l_1, "p_6", 1);
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double p_7 = PARAM(l_1, "p_7", 1);
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double p_8 = PARAM(l_1, "p_8", 1);
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double p_9 = PARAM(l_1, "p_9", 1);
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double p_10 = PARAM(l_1, "p_10", 1);
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double r1 = ADD(p_1, p_2);
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double r2 = ADD(r1, p_3);
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double r3 = ADD(r2, p_4);
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double r4 = ADD(r3, p_5);
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double r5 = ADD(r4, p_6);
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double r6 = ADD(r5, p_7);
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double r7 = ADD(r6, p_8);
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double r8 = ADD(r7, p_9);
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double ret = SUB(r8, p_10);
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l_2 = RETURN(l_1, ret);
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}
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--EXPECT--
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test:
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movsd 8(%rsp), %xmm8
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movsd 0x10(%rsp), %xmm9
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addsd %xmm0, %xmm1
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addsd %xmm2, %xmm1
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addsd %xmm3, %xmm1
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addsd %xmm4, %xmm1
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addsd %xmm5, %xmm1
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addsd %xmm6, %xmm1
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addsd %xmm7, %xmm1
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movapd %xmm1, %xmm0
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addsd %xmm8, %xmm0
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subsd %xmm9, %xmm0
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retq
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