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Clear destination regeister before INT to FP conversion to avoid partial register stall
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cc8f3fe987
commit
54597bc862
16
ir_x86.dasc
16
ir_x86.dasc
@ -4595,15 +4595,19 @@ static void ir_emit_int2fp(ir_ctx *ctx, ir_ref def, ir_insn *insn)
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if (!src64) {
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if (dst_type == IR_DOUBLE) {
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if (ctx->flags & IR_AVX) {
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| vxorps xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST)
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| vcvtsi2sd xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), Rd(op1_reg)
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} else {
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| pxor xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST)
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| cvtsi2sd xmm(def_reg-IR_REG_FP_FIRST), Rd(op1_reg)
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}
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} else {
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IR_ASSERT(dst_type == IR_FLOAT);
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if (ctx->flags & IR_AVX) {
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| vxorps xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST)
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| vcvtsi2ss xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), Rd(op1_reg)
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} else {
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| pxor xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST)
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| cvtsi2ss xmm(def_reg-IR_REG_FP_FIRST), Rd(op1_reg)
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}
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}
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@ -4612,15 +4616,19 @@ static void ir_emit_int2fp(ir_ctx *ctx, ir_ref def, ir_insn *insn)
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|.if X64
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if (dst_type == IR_DOUBLE) {
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if (ctx->flags & IR_AVX) {
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| vxorps xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST)
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| vcvtsi2sd xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), Rq(op1_reg)
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} else {
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| pxor xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST)
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| cvtsi2sd xmm(def_reg-IR_REG_FP_FIRST), Rq(op1_reg)
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}
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} else {
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IR_ASSERT(dst_type == IR_FLOAT);
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if (ctx->flags & IR_AVX) {
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| vxorps xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST)
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| vcvtsi2ss xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), Rq(op1_reg)
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} else {
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| pxor xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST)
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| cvtsi2ss xmm(def_reg-IR_REG_FP_FIRST), Rq(op1_reg)
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}
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}
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@ -4639,15 +4647,19 @@ static void ir_emit_int2fp(ir_ctx *ctx, ir_ref def, ir_insn *insn)
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if (!src64) {
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if (dst_type == IR_DOUBLE) {
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if (ctx->flags & IR_AVX) {
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| vxorps xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST)
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| vcvtsi2sd xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), dword [Ra(op1_reg)+offset]
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} else {
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| pxor xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST)
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| cvtsi2sd xmm(def_reg-IR_REG_FP_FIRST), dword [Ra(op1_reg)+offset]
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}
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} else {
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IR_ASSERT(dst_type == IR_FLOAT);
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if (ctx->flags & IR_AVX) {
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| vxorps xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST)
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| vcvtsi2ss xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), dword [Ra(op1_reg)+offset]
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} else {
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| pxor xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST)
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| cvtsi2ss xmm(def_reg-IR_REG_FP_FIRST), dword [Ra(op1_reg)+offset]
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}
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}
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@ -4656,15 +4668,19 @@ static void ir_emit_int2fp(ir_ctx *ctx, ir_ref def, ir_insn *insn)
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|.if X64
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if (dst_type == IR_DOUBLE) {
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if (ctx->flags & IR_AVX) {
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| vxorps xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST)
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| vcvtsi2sd xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), qword [Ra(op1_reg)+offset]
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} else {
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| pxor xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST)
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| cvtsi2sd xmm(def_reg-IR_REG_FP_FIRST), qword [Ra(op1_reg)+offset]
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}
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} else {
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IR_ASSERT(dst_type == IR_FLOAT);
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if (ctx->flags & IR_AVX) {
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| vxorps xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST)
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| vcvtsi2ss xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), qword [Ra(op1_reg)+offset]
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} else {
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| pxor xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST)
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| cvtsi2ss xmm(def_reg-IR_REG_FP_FIRST), qword [Ra(op1_reg)+offset]
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}
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}
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@ -15,6 +15,7 @@ x86
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test:
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subl $8, %esp
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movl 0xc(%esp), %eax
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pxor %xmm0, %xmm0
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cvtsi2sdl %eax, %xmm0
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movsd %xmm0, (%esp)
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fldl (%esp)
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@ -13,5 +13,6 @@ x86_64
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}
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--EXPECT--
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test:
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pxor %xmm0, %xmm0
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cvtsi2sdl %edi, %xmm0
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retq
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