diff --git a/ir.h b/ir.h
index c9eff7e..1b1243d 100644
--- a/ir.h
+++ b/ir.h
@@ -482,9 +482,6 @@ void ir_strtab_free(ir_strtab *strtab);
 #define IR_GEN_NATIVE          (1<<21)
 #define IR_GEN_C               (1<<22)
 
-/* x86 related */
-#define IR_AVX                 (1<<24)
-
 /* Temporary: Live Ranges */
 #define IR_LR_HAVE_VARS        (1<<25)
 #define IR_LR_HAVE_DESSA_MOVES (1<<26)
@@ -518,6 +515,7 @@ struct _ir_ctx {
 	ir_ref             consts_count;            /* number of constants stored in constants buffer */
 	ir_ref             consts_limit;            /* size of allocated constants buffer (it's extended when overflow) */
 	uint32_t           flags;                   /* IR context flags (see IR_* defines above) */
+	uint32_t           mflags;                  /* CPU specific flags (see IR_X86_... macros below) */
 	ir_ref             fold_cse_limit;          /* CSE finds identical insns backward from "insn_count" to "fold_cse_limit" */
 	ir_insn            fold_insn;               /* temporary storage for folding engine */
 	ir_hashtab        *binding;
@@ -732,6 +730,19 @@ void ir_consistency_check(void);
 /* Code patching (implementation in ir_patch.c) */
 int ir_patch(const void *code, size_t size, uint32_t jmp_table_size, const void *from_addr, const void *to_addr);
 
+/* CPU information (implementation in ir_cpuinfo.c) */
+#if defined(IR_TARGET_X86) || defined(IR_TARGET_X64)
+# define IR_X86_SSE2  (1<<0)
+# define IR_X86_SSE3  (1<<1)
+# define IR_X86_SSSE3 (1<<2)
+# define IR_X86_SSE41 (1<<3)
+# define IR_X86_SSE42 (1<<4)
+# define IR_X86_AVX   (1<<5)
+# define IR_X86_AVX2  (1<<6)
+#endif
+
+uint32_t ir_cpuinfo(void);
+
 /* Deoptimization helpers */
 const void *ir_emit_exitgroup(uint32_t first_exit_point, uint32_t exit_points_per_group, const void *exit_addr, void *code_buffer, size_t code_buffer_size, size_t *size_ptr);
 
@@ -768,8 +779,6 @@ int ir_mem_protect(void *ptr, size_t size);
 int ir_mem_unprotect(void *ptr, size_t size);
 int ir_mem_flush(void *ptr, size_t size);
 
-uint32_t ir_cpuinfo(void);
-
 #ifdef __cplusplus
 } /* extern "C" */
 #endif
diff --git a/ir_cpuinfo.c b/ir_cpuinfo.c
index 64a9bc6..5adfaeb 100644
--- a/ir_cpuinfo.c
+++ b/ir_cpuinfo.c
@@ -9,8 +9,6 @@
 
 #if defined(IR_TARGET_X86) || defined(IR_TARGET_X64)
 
-#include "ir_x86.h"
-
 #ifndef _WIN32
 IR_ALWAYS_INLINE void ir_cpuid_ex(uint32_t info[4], uint32_t function, uint32_t index)
 {
diff --git a/ir_gcm.c b/ir_gcm.c
index 4fc3512..880bff3 100644
--- a/ir_gcm.c
+++ b/ir_gcm.c
@@ -659,6 +659,7 @@ restart:
 
 	ir_init(&new_ctx, ctx->flags, consts_count, insns_count);
 	new_ctx.insns_count = insns_count;
+	new_ctx.mflags = ctx->mflags;
 	new_ctx.spill_base = ctx->spill_base;
 	new_ctx.fixed_stack_red_zone = ctx->fixed_stack_red_zone;
 	new_ctx.fixed_stack_frame_size = ctx->fixed_stack_frame_size;
diff --git a/ir_main.c b/ir_main.c
index e817b8f..a057d73 100644
--- a/ir_main.c
+++ b/ir_main.c
@@ -20,7 +20,9 @@ static void help(const char *cmd)
 		"Options:\n"
 		"  -O[012]                    - optimiztion level\n"
 		"  -S                         - dump final target assembler code\n"
+#if defined(IR_TARGET_X86) || defined(IR_TARGET_X64)
 		"  -mavx                      - use AVX instruction set\n"
+#endif
 		"  -muse-fp                   - use base frame pointer register\n"
 		"  --emit-c [file-name]       - convert to C source\n"
 		"  --save [file-name]         - save IR\n"
@@ -231,6 +233,7 @@ int main(int argc, char **argv)
 	bool emit_c = 0, dump_asm = 0, run = 0;
 	uint32_t dump = 0;
 	int opt_level = 2;
+	uint32_t flags = 0;
 	uint32_t mflags = 0;
 	uint64_t debug_regset = 0xffffffffffffffff;
 	bool dump_size = 0;
@@ -316,21 +319,23 @@ int main(int argc, char **argv)
 			dump_asm = 1;
 		} else if (strcmp(argv[i], "--run") == 0) {
 			run = 1;
+#if defined(IR_TARGET_X86) || defined(IR_TARGET_X64)
 		} else if (strcmp(argv[i], "-mavx") == 0) {
-			mflags |= IR_AVX;
+			mflags |= IR_X86_AVX;
+#endif
 		} else if (strcmp(argv[i], "-muse-fp") == 0) {
-			mflags |= IR_USE_FRAME_POINTER;
+			flags |= IR_USE_FRAME_POINTER;
 		} else if (strcmp(argv[i], "-mfastcall") == 0) {
-			mflags |= IR_FASTCALL_FUNC;
+			flags |= IR_FASTCALL_FUNC;
 #ifdef IR_DEBUG
 		} else if (strcmp(argv[i], "--debug-sccp") == 0) {
-			mflags |= IR_DEBUG_SCCP;
+			flags |= IR_DEBUG_SCCP;
 		} else if (strcmp(argv[i], "--debug-gcm") == 0) {
-			mflags |= IR_DEBUG_GCM;
+			flags |= IR_DEBUG_GCM;
 		} else if (strcmp(argv[i], "--debug-schedule") == 0) {
-			mflags |= IR_DEBUG_SCHEDULE;
+			flags |= IR_DEBUG_SCHEDULE;
 		} else if (strcmp(argv[i], "--debug-ra") == 0) {
-			mflags |= IR_DEBUG_RA;
+			flags |= IR_DEBUG_RA;
 #endif
 		} else if (strcmp(argv[i], "--debug-regset") == 0) {
 			if (i + 1 == argc || argv[i + 1][0] == '-') {
@@ -372,6 +377,20 @@ int main(int argc, char **argv)
 		return 1;
 	}
 
+#if defined(IR_TARGET_X86) || defined(IR_TARGET_X64)
+	uint32_t cpuinfo = ir_cpuinfo();
+
+	if (!(cpuinfo & IR_X86_SSE2)) {
+		fprintf(stderr, "ERROR: incompatible CPU (SSE2 is not supported)\n");
+		return 1;
+	}
+
+	if ((mflags & IR_X86_AVX) & !(cpuinfo & IR_X86_AVX)) {
+		fprintf(stderr, "ERROR: -mAVX is not compatible with CPU (AVX is not supported)\n");
+		return 1;
+	}
+#endif
+
 #ifdef _WIN32
 	if (!abort_fault) {
 		_set_abort_behavior(0, _WRITE_ABORT_MSG|_CALL_REPORTFAULT);
@@ -381,7 +400,7 @@ int main(int argc, char **argv)
 
 	ir_loader_init();
 
-	uint32_t flags = IR_FUNCTION | mflags;
+	flags |= IR_FUNCTION;
 
 	if (opt_level > 0) {
 		flags |= IR_OPT_FOLDING | IR_OPT_CFG | IR_OPT_CODEGEN;
@@ -393,6 +412,7 @@ int main(int argc, char **argv)
 		flags |= IR_GEN_NATIVE;
 	}
 	ir_init(&ctx, flags, 256, 1024);
+	ctx.mflags = mflags;
 	ctx.fixed_regset = ~debug_regset;
 
 	if (!ir_load(&ctx, f)) {
diff --git a/ir_test.c b/ir_test.c
index ae88476..cb7daff 100644
--- a/ir_test.c
+++ b/ir_test.c
@@ -95,11 +95,9 @@ int main(int argc, char **argv)
 	FILE *f;
 	int i;
 	int opt_level = 2;
+	uint32_t flags = 0;
 	uint32_t mflags = 0;
 	uint64_t debug_regset = 0xffffffffffffffff;
-#if defined(IR_TARGET_X86) || defined(IR_TARGET_X64)
-	uint32_t cpuinfo = ir_cpuinfo();
-#endif
 
 	ir_consistency_check();
 
@@ -114,25 +112,21 @@ int main(int argc, char **argv)
 			} else {
 				/* pass */
 			}
-		} else if (strcmp(argv[i], "-mavx") == 0) {
 #if defined(IR_TARGET_X86) || defined(IR_TARGET_X64)
-			if (!(cpuinfo & IR_X86_AVX)) {
-				fprintf(stderr, "ERROR: CPU doesn't support AVX instruction set)\n");
-				return 1;
-			}
+		} else if (strcmp(argv[i], "-mavx") == 0) {
+			mflags |= IR_X86_AVX;
 #endif
-			mflags |= IR_AVX;
 		} else if (strcmp(argv[i], "-muse-fp") == 0) {
-			mflags |= IR_USE_FRAME_POINTER;
+			flags |= IR_USE_FRAME_POINTER;
 #ifdef IR_DEBUG
 		} else if (strcmp(argv[i], "--debug-sccp") == 0) {
-			mflags |= IR_DEBUG_SCCP;
+			flags |= IR_DEBUG_SCCP;
 		} else if (strcmp(argv[i], "--debug-gcm") == 0) {
-			mflags |= IR_DEBUG_GCM;
+			flags |= IR_DEBUG_GCM;
 		} else if (strcmp(argv[i], "--debug-schedule") == 0) {
-			mflags |= IR_DEBUG_SCHEDULE;
+			flags |= IR_DEBUG_SCHEDULE;
 		} else if (strcmp(argv[i], "--debug-ra") == 0) {
-			mflags |= IR_DEBUG_RA;
+			flags |= IR_DEBUG_RA;
 #endif
 		} else if (strcmp(argv[i], "--debug-regset") == 0) {
 			if (i + 1 == argc || argv[i + 1][0] == '-') {
@@ -146,11 +140,26 @@ int main(int argc, char **argv)
 		}
 	}
 
-	uint32_t flags = IR_FUNCTION | mflags;
+#if defined(IR_TARGET_X86) || defined(IR_TARGET_X64)
+	uint32_t cpuinfo = ir_cpuinfo();
+
+	if (!(cpuinfo & IR_X86_SSE2)) {
+		fprintf(stderr, "ERROR: incompatible CPU (SSE2 is not supported)\n");
+		return 1;
+	}
+
+	if ((mflags & IR_X86_AVX) & !(cpuinfo & IR_X86_AVX)) {
+		fprintf(stderr, "ERROR: -mAVX is not compatible with CPU (AVX is not supported)\n");
+		return 1;
+	}
+#endif
+
+	flags |= IR_FUNCTION;
 	if (opt_level > 0) {
 		flags |= IR_OPT_FOLDING | IR_OPT_CFG | IR_OPT_CODEGEN;
 	}
 	ir_init(&ctx, flags, 256, 1024);
+	ctx.mflags = mflags;
 	ctx.fixed_regset = ~debug_regset;
 	gen_mandelbrot(&ctx);
 //	ir_save(&ctx, stderr);
diff --git a/ir_x86.dasc b/ir_x86.dasc
index ccbb45c..9f1cbd5 100644
--- a/ir_x86.dasc
+++ b/ir_x86.dasc
@@ -286,7 +286,7 @@
 |.endmacro
 
 |.macro ASM_FP_REG_REG_OP, fop, dop, avx_fop, avx_dop, type, dst, src
-||	if (ctx->flags & IR_AVX) {
+||	if (ctx->mflags & IR_X86_AVX) {
 |		ASM_SSE2_REG_REG_OP avx_fop, avx_dop, type, dst, src
 ||	} else {
 |		ASM_SSE2_REG_REG_OP fop, dop, type, dst, src
@@ -295,14 +295,14 @@
 
 |.macro ASM_FP_MEM_REG_OP, fop, dop, avx_fop, avx_dop, type, dst, src
 ||	if (type == IR_DOUBLE) {
-||		if (ctx->flags & IR_AVX) {
+||		if (ctx->mflags & IR_X86_AVX) {
 |			avx_dop qword dst, xmm(src-IR_REG_FP_FIRST)
 ||		} else {
 |			dop qword dst, xmm(src-IR_REG_FP_FIRST)
 ||		}
 ||	} else {
 ||		IR_ASSERT(type == IR_FLOAT);
-||		if (ctx->flags & IR_AVX) {
+||		if (ctx->mflags & IR_X86_AVX) {
 |			avx_fop dword dst, xmm(src-IR_REG_FP_FIRST)
 ||		} else {
 |			fop dword dst, xmm(src-IR_REG_FP_FIRST)
@@ -311,7 +311,7 @@
 |.endmacro
 
 |.macro ASM_FP_REG_MEM_OP, fop, dop, avx_fop, avx_dop, type, dst, src
-||	if (ctx->flags & IR_AVX) {
+||	if (ctx->mflags & IR_X86_AVX) {
 |		ASM_SSE2_REG_MEM_OP avx_fop, avx_dop, type, dst, src
 ||	} else {
 |		ASM_SSE2_REG_MEM_OP fop, dop, type, dst, src
@@ -1188,7 +1188,7 @@ binop_fp:
 				} else {
 					ir_match_fuse_load(ctx, insn->op2, ref);
 				}
-				if (ctx->flags & IR_AVX) {
+				if (ctx->mflags & IR_X86_AVX) {
 					return IR_BINOP_AVX;
 				} else {
 					return IR_BINOP_SSE2;
@@ -1892,13 +1892,13 @@ static void ir_emit_load_imm_fp(ir_ctx *ctx, ir_type type, ir_reg reg, ir_ref sr
 	int label;
 
 	if (type == IR_FLOAT && insn->val.u32 == 0) {
-		if (ctx->flags & IR_AVX) {
+		if (ctx->mflags & IR_X86_AVX) {
 			|	vxorps xmm(reg-IR_REG_FP_FIRST), xmm(reg-IR_REG_FP_FIRST), xmm(reg-IR_REG_FP_FIRST)
 		} else {
 			|	xorps xmm(reg-IR_REG_FP_FIRST), xmm(reg-IR_REG_FP_FIRST)
 		}
 	} else if (type == IR_DOUBLE && insn->val.u64 == 0) {
-		if (ctx->flags & IR_AVX) {
+		if (ctx->mflags & IR_X86_AVX) {
 			|	vxorpd xmm(reg-IR_REG_FP_FIRST), xmm(reg-IR_REG_FP_FIRST), xmm(reg-IR_REG_FP_FIRST)
 		} else {
 			|	xorpd xmm(reg-IR_REG_FP_FIRST), xmm(reg-IR_REG_FP_FIRST)
@@ -2074,7 +2074,7 @@ static void ir_emit_prologue(ir_ctx *ctx)
 					ir_reg fp = (ctx->flags & IR_USE_FRAME_POINTER) ? IR_REG_FRAME_POINTER : IR_REG_STACK_POINTER;
 
 					offset -= sizeof(void*);
-					if (ctx->flags & IR_AVX) {
+					if (ctx->mflags & IR_X86_AVX) {
 						|	vmovsd qword [Ra(fp)+offset], xmm(i-IR_REG_FP_FIRST)
 					} else {
 						|	movsd qword [Ra(fp)+offset], xmm(i-IR_REG_FP_FIRST)
@@ -2110,7 +2110,7 @@ static void ir_emit_epilogue(ir_ctx *ctx)
 					ir_reg fp = (ctx->flags & IR_USE_FRAME_POINTER) ? IR_REG_FRAME_POINTER : IR_REG_STACK_POINTER;
 
 					offset -= sizeof(void*);
-					if (ctx->flags & IR_AVX) {
+					if (ctx->mflags & IR_X86_AVX) {
 						|	vmovsd xmm(i-IR_REG_FP_FIRST), qword [Ra(fp)+offset]
 					} else {
 						|	movsd xmm(i-IR_REG_FP_FIRST), qword [Ra(fp)+offset]
@@ -3302,7 +3302,7 @@ static void ir_emit_op_fp(ir_ctx *ctx, ir_ref def, ir_insn *insn)
 				|.dword 0, 0x80000000, 0, 0
 				|.code
 			}
-			if (ctx->flags & IR_AVX) {
+			if (ctx->mflags & IR_X86_AVX) {
 				|	vxorpd xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), [->double_neg_const]
 			} else {
 				|	xorpd xmm(def_reg-IR_REG_FP_FIRST), [->double_neg_const]
@@ -3317,7 +3317,7 @@ static void ir_emit_op_fp(ir_ctx *ctx, ir_ref def, ir_insn *insn)
 				|.dword 0x80000000, 0, 0, 0
 				|.code
 			}
-			if (ctx->flags & IR_AVX) {
+			if (ctx->mflags & IR_X86_AVX) {
 				|	vxorps xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), [->float_neg_const]
 			} else {
 				|	xorps xmm(def_reg-IR_REG_FP_FIRST), [->float_neg_const]
@@ -3333,7 +3333,7 @@ static void ir_emit_op_fp(ir_ctx *ctx, ir_ref def, ir_insn *insn)
 				|.dword 0xffffffff, 0x7fffffff, 0, 0
 				|.code
 			}
-			if (ctx->flags & IR_AVX) {
+			if (ctx->mflags & IR_X86_AVX) {
 				|	vandpd xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), [->double_abs_const]
 			} else {
 				|	andpd xmm(def_reg-IR_REG_FP_FIRST), [->double_abs_const]
@@ -3348,7 +3348,7 @@ static void ir_emit_op_fp(ir_ctx *ctx, ir_ref def, ir_insn *insn)
 				|.dword 0x7fffffff, 0, 0, 0
 				|.code
 			}
-			if (ctx->flags & IR_AVX) {
+			if (ctx->mflags & IR_X86_AVX) {
 				|	vandps xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), [->float_abs_const]
 			} else {
 				|	andps xmm(def_reg-IR_REG_FP_FIRST), [->float_abs_const]
@@ -4607,7 +4607,7 @@ static void ir_emit_bitcast(ir_ctx *ctx, ir_ref def, ir_insn *insn)
 			if (src_type == IR_DOUBLE) {
 				IR_ASSERT(sizeof(void*) == 8);
 |.if X64
-				if (ctx->flags & IR_AVX) {
+				if (ctx->mflags & IR_X86_AVX) {
 					|	vmovd Rq(def_reg), xmm(op1_reg-IR_REG_FP_FIRST)
 				} else {
 					|	movd Rq(def_reg), xmm(op1_reg-IR_REG_FP_FIRST)
@@ -4615,7 +4615,7 @@ static void ir_emit_bitcast(ir_ctx *ctx, ir_ref def, ir_insn *insn)
 |.endif
 			} else {
 				IR_ASSERT(src_type == IR_FLOAT);
-				if (ctx->flags & IR_AVX) {
+				if (ctx->mflags & IR_X86_AVX) {
 					|	vmovd Rd(def_reg), xmm(op1_reg-IR_REG_FP_FIRST)
 				} else {
 					|	movd Rd(def_reg), xmm(op1_reg-IR_REG_FP_FIRST)
@@ -4661,7 +4661,7 @@ static void ir_emit_bitcast(ir_ctx *ctx, ir_ref def, ir_insn *insn)
 			if (dst_type == IR_DOUBLE) {
 				IR_ASSERT(sizeof(void*) == 8);
 |.if X64
-				if (ctx->flags & IR_AVX) {
+				if (ctx->mflags & IR_X86_AVX) {
 					|	vmovd xmm(def_reg-IR_REG_FP_FIRST), Rq(op1_reg)
 				} else {
 					|	movd xmm(def_reg-IR_REG_FP_FIRST), Rq(op1_reg)
@@ -4669,7 +4669,7 @@ static void ir_emit_bitcast(ir_ctx *ctx, ir_ref def, ir_insn *insn)
 |.endif
 			} else {
 				IR_ASSERT(dst_type == IR_FLOAT);
-				if (ctx->flags & IR_AVX) {
+				if (ctx->mflags & IR_X86_AVX) {
 					|	vmovd xmm(def_reg-IR_REG_FP_FIRST), Rd(op1_reg)
 				} else {
 					|	movd xmm(def_reg-IR_REG_FP_FIRST), Rd(op1_reg)
@@ -4722,7 +4722,7 @@ static void ir_emit_int2fp(ir_ctx *ctx, ir_ref def, ir_insn *insn)
 		}
 		if (!src64) {
 			if (dst_type == IR_DOUBLE) {
-				if (ctx->flags & IR_AVX) {
+				if (ctx->mflags & IR_X86_AVX) {
 					|	vxorps xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST)
 					|	vcvtsi2sd xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), Rd(op1_reg)
 				} else {
@@ -4731,7 +4731,7 @@ static void ir_emit_int2fp(ir_ctx *ctx, ir_ref def, ir_insn *insn)
 				}
 			} else {
 				IR_ASSERT(dst_type == IR_FLOAT);
-				if (ctx->flags & IR_AVX) {
+				if (ctx->mflags & IR_X86_AVX) {
 					|	vxorps xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST)
 					|	vcvtsi2ss xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), Rd(op1_reg)
 				} else {
@@ -4743,7 +4743,7 @@ static void ir_emit_int2fp(ir_ctx *ctx, ir_ref def, ir_insn *insn)
 			IR_ASSERT(sizeof(void*) == 8);
 |.if X64
 			if (dst_type == IR_DOUBLE) {
-				if (ctx->flags & IR_AVX) {
+				if (ctx->mflags & IR_X86_AVX) {
 					|	vxorps xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST)
 					|	vcvtsi2sd xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), Rq(op1_reg)
 				} else {
@@ -4752,7 +4752,7 @@ static void ir_emit_int2fp(ir_ctx *ctx, ir_ref def, ir_insn *insn)
 				}
 			} else {
 				IR_ASSERT(dst_type == IR_FLOAT);
-				if (ctx->flags & IR_AVX) {
+				if (ctx->mflags & IR_X86_AVX) {
 					|	vxorps xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST)
 					|	vcvtsi2ss xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), Rq(op1_reg)
 				} else {
@@ -4773,7 +4773,7 @@ static void ir_emit_int2fp(ir_ctx *ctx, ir_ref def, ir_insn *insn)
 
 		if (!src64) {
 			if (dst_type == IR_DOUBLE) {
-				if (ctx->flags & IR_AVX) {
+				if (ctx->mflags & IR_X86_AVX) {
 					|	vxorps xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST)
 					|	vcvtsi2sd xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), dword [Ra(op1_reg)+offset]
 				} else {
@@ -4782,7 +4782,7 @@ static void ir_emit_int2fp(ir_ctx *ctx, ir_ref def, ir_insn *insn)
 				}
 			} else {
 				IR_ASSERT(dst_type == IR_FLOAT);
-				if (ctx->flags & IR_AVX) {
+				if (ctx->mflags & IR_X86_AVX) {
 					|	vxorps xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST)
 					|	vcvtsi2ss xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), dword [Ra(op1_reg)+offset]
 				} else {
@@ -4794,7 +4794,7 @@ static void ir_emit_int2fp(ir_ctx *ctx, ir_ref def, ir_insn *insn)
 			IR_ASSERT(sizeof(void*) == 8);
 |.if X64
 			if (dst_type == IR_DOUBLE) {
-				if (ctx->flags & IR_AVX) {
+				if (ctx->mflags & IR_X86_AVX) {
 					|	vxorps xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST)
 					|	vcvtsi2sd xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), qword [Ra(op1_reg)+offset]
 				} else {
@@ -4803,7 +4803,7 @@ static void ir_emit_int2fp(ir_ctx *ctx, ir_ref def, ir_insn *insn)
 				}
 			} else {
 				IR_ASSERT(dst_type == IR_FLOAT);
-				if (ctx->flags & IR_AVX) {
+				if (ctx->mflags & IR_X86_AVX) {
 					|	vxorps xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST)
 					|	vcvtsi2ss xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), qword [Ra(op1_reg)+offset]
 				} else {
@@ -4843,14 +4843,14 @@ static void ir_emit_fp2int(ir_ctx *ctx, ir_ref def, ir_insn *insn)
 		}
 		if (!dst64) {
 			if (src_type == IR_DOUBLE) {
-				if (ctx->flags & IR_AVX) {
+				if (ctx->mflags & IR_X86_AVX) {
 					|	vcvtsd2si Rd(def_reg), xmm(op1_reg-IR_REG_FP_FIRST)
 				} else {
 					|	cvtsd2si Rd(def_reg), xmm(op1_reg-IR_REG_FP_FIRST)
 				}
 			} else {
 				IR_ASSERT(src_type == IR_FLOAT);
-				if (ctx->flags & IR_AVX) {
+				if (ctx->mflags & IR_X86_AVX) {
 					|	vcvtss2si Rd(def_reg), xmm(op1_reg-IR_REG_FP_FIRST)
 				} else {
 					|	cvtss2si Rd(def_reg), xmm(op1_reg-IR_REG_FP_FIRST)
@@ -4860,14 +4860,14 @@ static void ir_emit_fp2int(ir_ctx *ctx, ir_ref def, ir_insn *insn)
 			IR_ASSERT(sizeof(void*) == 8);
 |.if X64
 			if (src_type == IR_DOUBLE) {
-				if (ctx->flags & IR_AVX) {
+				if (ctx->mflags & IR_X86_AVX) {
 					|	vcvtsd2si Rq(def_reg), xmm(op1_reg-IR_REG_FP_FIRST)
 				} else {
 					|	cvtsd2si Rq(def_reg), xmm(op1_reg-IR_REG_FP_FIRST)
 				}
 			} else {
 				IR_ASSERT(src_type == IR_FLOAT);
-				if (ctx->flags & IR_AVX) {
+				if (ctx->mflags & IR_X86_AVX) {
 					|	vcvtss2si Rq(def_reg), xmm(op1_reg-IR_REG_FP_FIRST)
 				} else {
 					|	cvtss2si Rq(def_reg), xmm(op1_reg-IR_REG_FP_FIRST)
@@ -4882,14 +4882,14 @@ static void ir_emit_fp2int(ir_ctx *ctx, ir_ref def, ir_insn *insn)
 		_insn->const_flags |= IR_CONST_EMIT;
 		if (!dst64) {
 			if (src_type == IR_DOUBLE) {
-				if (ctx->flags & IR_AVX) {
+				if (ctx->mflags & IR_X86_AVX) {
 					|	vcvtsd2si Rd(def_reg), qword [=>label]
 				} else {
 					|	cvtsd2si Rd(def_reg), qword [=>label]
 				}
 			} else {
 				IR_ASSERT(src_type == IR_FLOAT);
-				if (ctx->flags & IR_AVX) {
+				if (ctx->mflags & IR_X86_AVX) {
 					|	vcvtss2si Rd(def_reg), dword [=>label]
 				} else {
 					|	cvtss2si Rd(def_reg), dword [=>label]
@@ -4899,14 +4899,14 @@ static void ir_emit_fp2int(ir_ctx *ctx, ir_ref def, ir_insn *insn)
 			IR_ASSERT(sizeof(void*) == 8);
 |.if X64
 			if (src_type == IR_DOUBLE) {
-				if (ctx->flags & IR_AVX) {
+				if (ctx->mflags & IR_X86_AVX) {
 					|	vcvtsd2si Rq(def_reg), qword [=>label]
 				} else {
 					|	cvtsd2si Rq(def_reg), qword [=>label]
 				}
 			} else {
 				IR_ASSERT(src_type == IR_FLOAT);
-				if (ctx->flags & IR_AVX) {
+				if (ctx->mflags & IR_X86_AVX) {
 					|	vcvtss2si Rq(def_reg), dword [=>label]
 				} else {
 					|	cvtss2si Rq(def_reg), dword [=>label]
@@ -4925,14 +4925,14 @@ static void ir_emit_fp2int(ir_ctx *ctx, ir_ref def, ir_insn *insn)
 
 		if (!dst64) {
 			if (src_type == IR_DOUBLE) {
-				if (ctx->flags & IR_AVX) {
+				if (ctx->mflags & IR_X86_AVX) {
 					|	vcvtsd2si Rd(def_reg), qword [Ra(op1_reg)+offset]
 				} else {
 					|	cvtsd2si Rd(def_reg), qword [Ra(op1_reg)+offset]
 				}
 			} else {
 				IR_ASSERT(src_type == IR_FLOAT);
-				if (ctx->flags & IR_AVX) {
+				if (ctx->mflags & IR_X86_AVX) {
 					|	vcvtss2si Rd(def_reg), dword [Ra(op1_reg)+offset]
 				} else {
 					|	cvtss2si Rd(def_reg), dword [Ra(op1_reg)+offset]
@@ -4942,14 +4942,14 @@ static void ir_emit_fp2int(ir_ctx *ctx, ir_ref def, ir_insn *insn)
 			IR_ASSERT(sizeof(void*) == 8);
 |.if X64
 			if (src_type == IR_DOUBLE) {
-				if (ctx->flags & IR_AVX) {
+				if (ctx->mflags & IR_X86_AVX) {
 					|	vcvtsd2si Rq(def_reg), qword [Ra(op1_reg)+offset]
 				} else {
 					|	cvtsd2si Rq(def_reg), qword [Ra(op1_reg)+offset]
 				}
 			} else {
 				IR_ASSERT(src_type == IR_FLOAT);
-				if (ctx->flags & IR_AVX) {
+				if (ctx->mflags & IR_X86_AVX) {
 					|	vcvtss2si Rq(def_reg), dword [Ra(op1_reg)+offset]
 				} else {
 					|	cvtss2si Rq(def_reg), dword [Ra(op1_reg)+offset]
@@ -4985,14 +4985,14 @@ static void ir_emit_fp2fp(ir_ctx *ctx, ir_ref def, ir_insn *insn)
 				ir_emit_fp_mov(ctx, dst_type, def_reg, op1_reg);
 			}
 		} else if (src_type == IR_DOUBLE) {
-			if (ctx->flags & IR_AVX) {
+			if (ctx->mflags & IR_X86_AVX) {
 				|	vcvtsd2ss xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), xmm(op1_reg-IR_REG_FP_FIRST)
 			} else {
 				|	cvtsd2ss xmm(def_reg-IR_REG_FP_FIRST), xmm(op1_reg-IR_REG_FP_FIRST)
 			}
 		} else {
 			IR_ASSERT(src_type == IR_FLOAT);
-			if (ctx->flags & IR_AVX) {
+			if (ctx->mflags & IR_X86_AVX) {
 				|	vcvtss2sd xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), xmm(op1_reg-IR_REG_FP_FIRST)
 			} else {
 				|	cvtss2sd xmm(def_reg-IR_REG_FP_FIRST), xmm(op1_reg-IR_REG_FP_FIRST)
@@ -5004,14 +5004,14 @@ static void ir_emit_fp2fp(ir_ctx *ctx, ir_ref def, ir_insn *insn)
 
 		_insn->const_flags |= IR_CONST_EMIT;
 		if (src_type == IR_DOUBLE) {
-			if (ctx->flags & IR_AVX) {
+			if (ctx->mflags & IR_X86_AVX) {
 				|	vcvtsd2ss xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), qword [=>label]
 			} else {
 				|	cvtsd2ss xmm(def_reg-IR_REG_FP_FIRST), qword [=>label]
 			}
 		} else {
 			IR_ASSERT(src_type == IR_FLOAT);
-			if (ctx->flags & IR_AVX) {
+			if (ctx->mflags & IR_X86_AVX) {
 				|	vcvtss2sd xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), dword [=>label]
 			} else {
 				|	cvtss2sd xmm(def_reg-IR_REG_FP_FIRST), dword [=>label]
@@ -5027,14 +5027,14 @@ static void ir_emit_fp2fp(ir_ctx *ctx, ir_ref def, ir_insn *insn)
 		}
 
 		if (src_type == IR_DOUBLE) {
-			if (ctx->flags & IR_AVX) {
+			if (ctx->mflags & IR_X86_AVX) {
 				|	vcvtsd2ss xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), qword [Ra(op1_reg)+offset]
 			} else {
 				|	cvtsd2ss xmm(def_reg-IR_REG_FP_FIRST), qword [Ra(op1_reg)+offset]
 			}
 		} else {
 			IR_ASSERT(src_type == IR_FLOAT);
-			if (ctx->flags & IR_AVX) {
+			if (ctx->mflags & IR_X86_AVX) {
 				|	vcvtss2sd xmm(def_reg-IR_REG_FP_FIRST), xmm(def_reg-IR_REG_FP_FIRST), dword [Ra(op1_reg)+offset]
 			} else {
 				|	cvtss2sd xmm(def_reg-IR_REG_FP_FIRST), dword [Ra(op1_reg)+offset]
@@ -6184,7 +6184,7 @@ static int32_t ir_emit_arguments(ir_ctx *ctx, ir_ref def, ir_insn *insn, ir_reg
 				src_reg = fp_reg_params[j-3];
 				dst_reg = int_reg_params[j-3];
 |.if X64
-				if (ctx->flags & IR_AVX) {
+				if (ctx->mflags & IR_X86_AVX) {
 					|	vmovd Rq(dst_reg), xmm(src_reg-IR_REG_FP_FIRST)
 				} else {
 					|	movd Rq(dst_reg), xmm(src_reg-IR_REG_FP_FIRST)
diff --git a/ir_x86.h b/ir_x86.h
index 42bb78a..e88d311 100644
--- a/ir_x86.h
+++ b/ir_x86.h
@@ -221,12 +221,4 @@ struct _ir_target_constraints {
 	int8_t      hints[IR_MAX_REG_ARGS + 3];
 };
 
-#define IR_X86_SSE2  (1<<0)
-#define IR_X86_SSE3  (1<<1)
-#define IR_X86_SSSE3 (1<<2)
-#define IR_X86_SSE41 (1<<3)
-#define IR_X86_SSE42 (1<<4)
-#define IR_X86_AVX   (1<<5)
-#define IR_X86_AVX2  (1<<6)
-
 #endif /* IR_X86_H */