danog/ir
1
0
Fork 0
mirror of https://github.com/danog/ir.git synced 2025-01-22 05:31:32 +01:00
Code Issues Packages Projects Releases Wiki Activity

Avoid useless move

Browse Source
This commit is contained in:
Dmitry Stogov 2022-09-20 00:26:56 +03:00
parent eacb9c1528
commit 63f21925b3
2 changed files with 28 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
ir_aarch64.dasc
View File

@ -4319,8 +4319,13 @@ static int ir_emit_dessa_move(ir_ctx *ctx, uint8_t type, ir_ref from, ir_ref to)
ir_emit_load(ctx, type, from_reg, from);
}
if (to_reg != IR_REG_NONE && (to_reg & IR_REG_SPILL_STORE)) {
to_reg &= ~IR_REG_SPILL_STORE;
spill_store = 1;
if (from_reg != IR_REG_NONE) {
/* store directly into spill slot (valid only when to_reg register is not reused) */
to_reg = IR_REG_NONE;
} else {
to_reg &= ~IR_REG_SPILL_STORE;
spill_store = 1;
}
}
if (from_reg != IR_REG_NONE && to_reg != IR_REG_NONE) {
if (from_reg != to_reg) {
@ -4347,13 +4352,13 @@ static int ir_emit_dessa_move(ir_ctx *ctx, uint8_t type, ir_ref from, ir_ref to)
ir_emit_load(ctx, type, from_reg, from);
}
if (to_reg != IR_REG_NONE && (to_reg & IR_REG_SPILL_STORE)) {
#if 1
/* store directly into spill slot (valid only when to_reg register is not reused) */
to_reg = IR_REG_NONE;
#else
to_reg &= ~IR_REG_SPILL_STORE;
spill_store = 1;
#endif
if (from_reg != IR_REG_NONE) {
/* store directly into spill slot (valid only when to_reg register is not reused) */
to_reg = IR_REG_NONE;
} else {
to_reg &= ~IR_REG_SPILL_STORE;
spill_store = 1;
}
}
if (from_reg != IR_REG_NONE && to_reg != IR_REG_NONE) {
if (from_reg != to_reg) {

23
ir_x86.dasc
View File

@ -6736,8 +6736,13 @@ static int ir_emit_dessa_move(ir_ctx *ctx, uint8_t type, ir_ref from, ir_ref to)
ir_emit_load(ctx, type, from_reg, from);
}
if (to_reg != IR_REG_NONE && (to_reg & IR_REG_SPILL_STORE)) {
to_reg &= ~IR_REG_SPILL_STORE;
spill_store = 1;
if (from_reg != IR_REG_NONE) {
/* store directly into spill slot (valid only when to_reg register is not reused) */
to_reg = IR_REG_NONE;
} else {
to_reg &= ~IR_REG_SPILL_STORE;
spill_store = 1;
}
}
if (from_reg != IR_REG_NONE && to_reg != IR_REG_NONE) {
if (from_reg != to_reg) {
@ -6769,13 +6774,13 @@ static int ir_emit_dessa_move(ir_ctx *ctx, uint8_t type, ir_ref from, ir_ref to)
ir_emit_load(ctx, type, from_reg, from);
}
if (to_reg != IR_REG_NONE && (to_reg & IR_REG_SPILL_STORE)) {
#if 1
/* store directly into spill slot (valid only when to_reg register is not reused) */
to_reg = IR_REG_NONE;
#else
to_reg &= ~IR_REG_SPILL_STORE;
spill_store = 1;
#endif
if (from_reg != IR_REG_NONE) {
/* store directly into spill slot (valid only when to_reg register is not reused) */
to_reg = IR_REG_NONE;
} else {
to_reg &= ~IR_REG_SPILL_STORE;
spill_store = 1;
}
}
if (from_reg != IR_REG_NONE && to_reg != IR_REG_NONE) {
if (from_reg != to_reg) {