From 68068c4f58837fac260d6e2658ba409f6023f185 Mon Sep 17 00:00:00 2001 From: Dmitry Stogov Date: Fri, 17 Nov 2023 14:24:33 +0300 Subject: [PATCH] Split ir_ctx->flags into public and private (ir_ctx->flags2) --- ir.c | 10 +++++----- ir.h | 31 ++++++------------------------- ir_aarch64.dasc | 41 ++++++++++++++++++++++++++++++++--------- ir_cfg.c | 20 ++++++++++---------- ir_check.c | 4 ++-- ir_gcm.c | 5 +++-- ir_private.h | 21 +++++++++++++++++++++ ir_ra.c | 24 ++++++++++++------------ ir_sccp.c | 6 +++--- ir_x86.dasc | 17 +++++++++-------- 10 files changed, 103 insertions(+), 76 deletions(-) diff --git a/ir.c b/ir.c index a064cd1..521d33a 100644 --- a/ir.c +++ b/ir.c @@ -782,7 +782,7 @@ restart: } while (1); ir_fold_restart: - if (!(ctx->flags & IR_OPT_IN_SCCP)) { + if (!(ctx->flags2 & IR_OPT_IN_SCCP)) { op1_insn = ctx->ir_base + op1; op2_insn = ctx->ir_base + op2; op3_insn = ctx->ir_base + op3; @@ -795,7 +795,7 @@ ir_fold_restart: return IR_FOLD_DO_RESTART; } ir_fold_cse: - if (!(ctx->flags & IR_OPT_IN_SCCP)) { + if (!(ctx->flags2 & IR_OPT_IN_SCCP)) { /* Local CSE */ ref = _ir_fold_cse(ctx, opt, op1, op2, op3); if (ref) { @@ -819,7 +819,7 @@ ir_fold_cse: return ref; } ir_fold_emit: - if (!(ctx->flags & IR_OPT_IN_SCCP)) { + if (!(ctx->flags2 & IR_OPT_IN_SCCP)) { return ir_emit(ctx, opt, op1, op2, op3); } else { ctx->fold_insn.optx = opt; @@ -829,14 +829,14 @@ ir_fold_emit: return IR_FOLD_DO_EMIT; } ir_fold_copy: - if (!(ctx->flags & IR_OPT_IN_SCCP)) { + if (!(ctx->flags2 & IR_OPT_IN_SCCP)) { return ref; } else { ctx->fold_insn.op1 = ref; return IR_FOLD_DO_COPY; } ir_fold_const: - if (!(ctx->flags & IR_OPT_IN_SCCP)) { + if (!(ctx->flags2 & IR_OPT_IN_SCCP)) { return ir_const(ctx, val, IR_OPT_TYPE(opt)); } else { ctx->fold_insn.type = IR_OPT_TYPE(opt); diff --git a/ir.h b/ir.h index d0ebf9a..a09bf82 100644 --- a/ir.h +++ b/ir.h @@ -496,38 +496,18 @@ void ir_strtab_free(ir_strtab *strtab); #define IR_SKIP_PROLOGUE (1<<6) /* Don't generate function prologue. */ #define IR_USE_FRAME_POINTER (1<<7) #define IR_PREALLOCATED_STACK (1<<8) -#define IR_HAS_ALLOCA (1<<9) -#define IR_HAS_CALLS (1<<10) -#define IR_NO_STACK_COMBINE (1<<11) -#define IR_START_BR_TARGET (1<<12) -#define IR_ENTRY_BR_TARGET (1<<13) -#define IR_GEN_ENDBR (1<<14) -#define IR_MERGE_EMPTY_ENTRIES (1<<15) - -#define IR_CFG_HAS_LOOPS (1<<16) -#define IR_IRREDUCIBLE_CFG (1<<17) +#define IR_NO_STACK_COMBINE (1<<9) +#define IR_START_BR_TARGET (1<<10) +#define IR_ENTRY_BR_TARGET (1<<11) +#define IR_GEN_ENDBR (1<<12) +#define IR_MERGE_EMPTY_ENTRIES (1<<13) #define IR_OPT_FOLDING (1<<18) #define IR_OPT_CFG (1<<19) /* merge BBs, by remove END->BEGIN nodes during CFG construction */ #define IR_OPT_CODEGEN (1<<20) -#define IR_OPT_IN_SCCP (1<<21) -#define IR_LINEAR (1<<22) #define IR_GEN_NATIVE (1<<23) #define IR_GEN_CODE (1<<24) /* C or LLVM */ -/* Temporary: SCCP -> CFG */ -#define IR_SCCP_DONE (1<<25) - -/* Temporary: Dominators -> Loops */ -#define IR_NO_LOOPS (1<<25) - -/* Temporary: Live Ranges */ -#define IR_LR_HAVE_DESSA_MOVES (1<<25) - -/* Temporary: Register Allocator */ -#define IR_RA_HAVE_SPLITS (1<<25) -#define IR_RA_HAVE_SPILLS (1<<26) - /* debug related */ #ifdef IR_DEBUG # define IR_DEBUG_SCCP (1<<27) @@ -560,6 +540,7 @@ struct _ir_ctx { ir_ref consts_count; /* number of constants stored in constants buffer */ ir_ref consts_limit; /* size of allocated constants buffer (it's extended when overflow) */ uint32_t flags; /* IR context flags (see IR_* defines above) */ + uint32_t flags2; /* IR context provate flags (see IR_* defines in ir_private.h) */ ir_type ret_type; /* Function return type */ uint32_t mflags; /* CPU specific flags (see IR_X86_... macros below) */ int32_t status; /* non-zero error code (see IR_ERROR_... macros), app may use negative codes */ diff --git a/ir_aarch64.dasc b/ir_aarch64.dasc index 5079bbd..733534d 100644 --- a/ir_aarch64.dasc +++ b/ir_aarch64.dasc @@ -752,7 +752,7 @@ binop_fp: } break; case IR_CALL: - ctx->flags |= IR_HAS_CALLS; + ctx->flags2 |= IR_HAS_CALLS; return IR_CALL; case IR_VAR: return IR_SKIPPED | IR_VAR; @@ -760,7 +760,8 @@ binop_fp: return ctx->use_lists[ref].count > 0 ? IR_PARAM : IR_SKIPPED | IR_PARAM; case IR_ALLOCA: if (ctx->flags & IR_FUNCTION) { - ctx->flags |= IR_USE_FRAME_POINTER | IR_HAS_ALLOCA; + ctx->flags |= IR_USE_FRAME_POINTER; + ctx->flags2 |= IR_HAS_ALLOCA; } return IR_ALLOCA; case IR_LOAD: @@ -1361,7 +1362,7 @@ static void ir_emit_epilogue(ir_ctx *ctx) } if (ctx->flags & IR_USE_FRAME_POINTER) { - if (ctx->call_stack_size || (ctx->flags & IR_HAS_ALLOCA)) { + if (ctx->call_stack_size || (ctx->flags2 & IR_HAS_ALLOCA)) { | mov sp, x29 } | ldp x29, x30, [sp], # (ctx->stack_frame_size+16) @@ -3448,7 +3449,7 @@ static void ir_emit_alloca(ir_ctx *ctx, ir_ref def, ir_insn *insn) IR_ASSERT(IR_IS_TYPE_INT(val->type)); IR_ASSERT(IR_IS_TYPE_UNSIGNED(val->type) || val->val.i64 > 0); - if (ctx->flags & IR_HAS_CALLS) { + if (ctx->flags2 & IR_HAS_CALLS) { /* Stack must be 16 byte aligned */ size = IR_ALIGNED_SIZE(size, 16); } else { @@ -3459,7 +3460,7 @@ static void ir_emit_alloca(ir_ctx *ctx, ir_ref def, ir_insn *insn) ctx->call_stack_size += size; } } else { - int32_t alignment = (ctx->flags & IR_HAS_CALLS) ? 16 : 8; + int32_t alignment = (ctx->flags2 & IR_HAS_CALLS) ? 16 : 8; ir_reg op2_reg = ctx->regs[def][2]; ir_type type = ctx->ir_base[insn->op2].type; @@ -3496,7 +3497,7 @@ static void ir_emit_afree(ir_ctx *ctx, ir_ref def, ir_insn *insn) IR_ASSERT(IR_IS_TYPE_INT(val->type)); IR_ASSERT(IR_IS_TYPE_UNSIGNED(val->type) || val->val.i64 > 0); - if (ctx->flags & IR_HAS_CALLS) { + if (ctx->flags2 & IR_HAS_CALLS) { /* Stack must be 16 byte aligned */ size = IR_ALIGNED_SIZE(size, 16); } else { @@ -3507,7 +3508,7 @@ static void ir_emit_afree(ir_ctx *ctx, ir_ref def, ir_insn *insn) ctx->call_stack_size -= size; } } else { -// int32_t alignment = (ctx->flags & IR_HAS_CALLS) ? 16 : 8; +// int32_t alignment = (ctx->flags2 & IR_HAS_CALLS) ? 16 : 8; ir_reg op2_reg = ctx->regs[def][2]; ir_type type = ctx->ir_base[insn->op2].type; @@ -3540,6 +3541,18 @@ static void ir_emit_frame_addr(ir_ctx *ctx, ir_ref def) } } +static void ir_emit_va_start(ir_ctx *ctx, ir_ref def, ir_insn *insn) +{ +} + +static void ir_emit_va_copy(ir_ctx *ctx, ir_ref def, ir_insn *insn) +{ +} + +static void ir_emit_va_arg(ir_ctx *ctx, ir_ref def, ir_insn *insn) +{ +} + static void ir_emit_switch(ir_ctx *ctx, uint32_t b, ir_ref def, ir_insn *insn) { ir_backend_data *data = ctx->data; @@ -4979,12 +4992,12 @@ void ir_fix_stack_frame(ir_ctx *ctx) ctx->stack_frame_alignment = 0; ctx->call_stack_size = 0; - if ((ctx->flags & IR_HAS_CALLS) && !(ctx->flags & IR_FUNCTION)) { + if ((ctx->flags2 & IR_HAS_CALLS) && !(ctx->flags & IR_FUNCTION)) { while (IR_ALIGNED_SIZE(ctx->stack_frame_size, 16) != ctx->stack_frame_size) { ctx->stack_frame_size += sizeof(void*); ctx->stack_frame_alignment += sizeof(void*); } - } else if (ctx->flags & IR_HAS_CALLS) { + } else if (ctx->flags2 & IR_HAS_CALLS) { ctx->flags |= IR_USE_FRAME_POINTER; /* Stack must be 16 byte aligned */ if (!(ctx->flags & IR_FUNCTION)) { @@ -5111,6 +5124,7 @@ void *ir_emit_code(ir_ctx *ctx, size_t *size_ptr) case IR_PI: case IR_PHI: case IR_SNAPSHOT: + case IR_VA_END: break; case IR_MUL_PWR2: case IR_DIV_PWR2: @@ -5278,6 +5292,15 @@ void *ir_emit_code(ir_ctx *ctx, size_t *size_ptr) case IR_ALLOCA: ir_emit_alloca(ctx, i, insn); break; + case IR_VA_START: + ir_emit_va_start(ctx, i, insn); + break; + case IR_VA_COPY: + ir_emit_va_copy(ctx, i, insn); + break; + case IR_VA_ARG: + ir_emit_va_arg(ctx, i, insn); + break; case IR_AFREE: ir_emit_afree(ctx, i, insn); break; diff --git a/ir_cfg.c b/ir_cfg.c index b886319..f22d9f0 100644 --- a/ir_cfg.c +++ b/ir_cfg.c @@ -231,7 +231,7 @@ next_successor: bb = blocks + 1; count = 0; /* SCCP already removed UNREACHABKE blocks, otherwise all blocks are marked as UNREACHABLE first */ - bb_init_falgs = (ctx->flags & IR_SCCP_DONE) ? 0 : IR_BB_UNREACHABLE; + bb_init_falgs = (ctx->flags2 & IR_SCCP_DONE) ? 0 : IR_BB_UNREACHABLE; IR_BITSET_FOREACH(bb_starts, len, start) { end = _blocks[start]; _blocks[start] = b; @@ -313,7 +313,7 @@ next_successor: ctx->cfg_edges = edges; ctx->cfg_map = _blocks; - if (!(ctx->flags & IR_SCCP_DONE)) { + if (!(ctx->flags2 & IR_SCCP_DONE)) { uint32_t reachable_count = 0; /* Mark reachable blocks */ @@ -600,7 +600,7 @@ int ir_build_dominators_tree(ir_ctx *ctx) uint32_t *edges; bool changed; - ctx->flags &= ~IR_NO_LOOPS; + ctx->flags2 &= ~IR_NO_LOOPS; postnum = 1; compute_postnum(ctx, &postnum, 1); @@ -706,7 +706,7 @@ int ir_build_dominators_tree(ir_ctx *ctx) ir_block *blocks, *bb; uint32_t *edges; - ctx->flags |= IR_NO_LOOPS; + ctx->flags2 |= IR_NO_LOOPS; /* Find immediate dominators */ blocks = ctx->cfg_blocks; @@ -726,7 +726,7 @@ int ir_build_dominators_tree(ir_ctx *ctx) if (UNEXPECTED(idom > b)) { /* In rare cases, LOOP_BEGIN.op1 may be a back-edge. Skip back-edges. */ - ctx->flags &= ~IR_NO_LOOPS; + ctx->flags2 &= ~IR_NO_LOOPS; while (1) { k--; p++; @@ -753,7 +753,7 @@ int ir_build_dominators_tree(ir_ctx *ctx) } } } else { - ctx->flags &= ~IR_NO_LOOPS; + ctx->flags2 &= ~IR_NO_LOOPS; } } bb->idom = idom; @@ -805,7 +805,7 @@ int ir_find_loops(ir_ctx *ctx) uint32_t *edges = ctx->cfg_edges; ir_worklist work; - if (ctx->flags & IR_NO_LOOPS) { + if (ctx->flags2 & IR_NO_LOOPS) { return 1; } @@ -908,13 +908,13 @@ next: if (UNEXPECTED(irreducible)) { // TODO: Support for irreducible loops ??? bb->flags |= IR_BB_IRREDUCIBLE_LOOP; - ctx->flags |= IR_IRREDUCIBLE_CFG; + ctx->flags2 |= IR_IRREDUCIBLE_CFG; while (ir_worklist_len(&work)) { ir_worklist_pop(&work); } } else if (ir_worklist_len(&work)) { bb->flags |= IR_BB_LOOP_HEADER; - ctx->flags |= IR_CFG_HAS_LOOPS; + ctx->flags2 |= IR_CFG_HAS_LOOPS; bb->loop_depth = 1; while (ir_worklist_len(&work)) { j = ir_worklist_pop(&work); @@ -942,7 +942,7 @@ next: } } - if (ctx->flags & IR_CFG_HAS_LOOPS) { + if (ctx->flags2 & IR_CFG_HAS_LOOPS) { for (n = 1; n < count; n++) { i = sorted_blocks[n]; ir_block *bb = &blocks[i]; diff --git a/ir_check.c b/ir_check.c index 1dbe4a7..671d6e7 100644 --- a/ir_check.c +++ b/ir_check.c @@ -127,7 +127,7 @@ bool ir_check(const ir_ctx *ctx) } if (use >= i && !(insn->op == IR_PHI - && (!(ctx->flags & IR_LINEAR) || ctx->ir_base[insn->op1].op == IR_LOOP_BEGIN))) { + && (!(ctx->flags2 & IR_LINEAR) || ctx->ir_base[insn->op1].op == IR_LOOP_BEGIN))) { fprintf(stderr, "ir_base[%d].ops[%d] invalid forward reference (%d)\n", i, j, use); ok = 0; } @@ -194,7 +194,7 @@ bool ir_check(const ir_ctx *ctx) break; } } - if ((ctx->flags & IR_LINEAR) + if ((ctx->flags2 & IR_LINEAR) && ctx->cfg_map && insn->op != IR_PHI && !ir_check_domination(ctx, use, i)) { diff --git a/ir_gcm.c b/ir_gcm.c index 694271a..6161426 100644 --- a/ir_gcm.c +++ b/ir_gcm.c @@ -682,7 +682,7 @@ restart: ir_mem_free(_next); ctx->prev_ref = _prev; - ctx->flags |= IR_LINEAR; + ctx->flags2 |= IR_LINEAR; ir_truncate(ctx); return 1; @@ -694,6 +694,7 @@ restart: ir_init(&new_ctx, ctx->flags, consts_count, insns_count); new_ctx.insns_count = insns_count; + new_ctx.flags2 = ctx->flags2; new_ctx.ret_type = ctx->ret_type; new_ctx.mflags = ctx->mflags; new_ctx.spill_base = ctx->spill_base; @@ -867,7 +868,7 @@ restart: IR_ASSERT(new_ctx.consts_count == new_ctx.consts_limit); IR_ASSERT(new_ctx.insns_count == new_ctx.insns_limit); memcpy(ctx, &new_ctx, sizeof(ir_ctx)); - ctx->flags |= IR_LINEAR; + ctx->flags2 |= IR_LINEAR; ir_mem_free(_next); diff --git a/ir_private.h b/ir_private.h index 0f6267b..5010793 100644 --- a/ir_private.h +++ b/ir_private.h @@ -876,6 +876,27 @@ IR_ALWAYS_INLINE uint32_t ir_insn_len(const ir_insn *insn) return ir_insn_inputs_to_len(insn->inputs_count); } +/*** IR Context Private Flags (ir_ctx->flags2) ***/ +#define IR_CFG_HAS_LOOPS (1<<0) +#define IR_IRREDUCIBLE_CFG (1<<1) +#define IR_HAS_ALLOCA (1<<2) +#define IR_HAS_CALLS (1<<3) +#define IR_OPT_IN_SCCP (1<<4) +#define IR_LINEAR (1<<5) + +/* Temporary: SCCP -> CFG */ +#define IR_SCCP_DONE (1<<25) + +/* Temporary: Dominators -> Loops */ +#define IR_NO_LOOPS (1<<25) + +/* Temporary: Live Ranges */ +#define IR_LR_HAVE_DESSA_MOVES (1<<25) + +/* Temporary: Register Allocator */ +#define IR_RA_HAVE_SPLITS (1<<25) +#define IR_RA_HAVE_SPILLS (1<<26) + /*** IR Binding ***/ IR_ALWAYS_INLINE ir_ref ir_binding_find(const ir_ctx *ctx, ir_ref ref) { diff --git a/ir_ra.c b/ir_ra.c index d3b9ac1..916653b 100644 --- a/ir_ra.c +++ b/ir_ra.c @@ -593,7 +593,7 @@ int ir_compute_live_ranges(ir_ctx *ctx) ir_bitqueue queue; ir_live_interval *ival; - if (!(ctx->flags & IR_LINEAR) || !ctx->vregs) { + if (!(ctx->flags2 & IR_LINEAR) || !ctx->vregs) { return 0; } @@ -606,7 +606,7 @@ int ir_compute_live_ranges(ir_ctx *ctx) ctx->vars = IR_UNUSED; /* Compute Live Ranges */ - ctx->flags &= ~IR_LR_HAVE_DESSA_MOVES; + ctx->flags2 &= ~IR_LR_HAVE_DESSA_MOVES; len = ir_bitset_len(ctx->vregs_count + 1); bb_live = ir_mem_malloc((ctx->cfg_blocks_count + 1) * len * sizeof(ir_bitset_base_t)); @@ -1243,7 +1243,7 @@ int ir_compute_live_ranges(ir_ctx *ctx) ir_list live_lists; ir_live_interval *ival; - if (!(ctx->flags & IR_LINEAR) || !ctx->vregs) { + if (!(ctx->flags2 & IR_LINEAR) || !ctx->vregs) { return 0; } @@ -1256,7 +1256,7 @@ int ir_compute_live_ranges(ir_ctx *ctx) ctx->vars = IR_UNUSED; /* Compute Live Ranges */ - ctx->flags &= ~IR_LR_HAVE_DESSA_MOVES; + ctx->flags2 &= ~IR_LR_HAVE_DESSA_MOVES; /* vregs + tmp + fixed + SRATCH + ALL */ ctx->live_intervals = ir_mem_calloc(ctx->vregs_count + 1 + IR_REG_NUM + 2, sizeof(ir_live_interval*)); @@ -1645,7 +1645,7 @@ static void ir_add_phi_move(ir_ctx *ctx, uint32_t b, ir_ref from, ir_ref to) if (IR_IS_CONST_REF(from) || ctx->vregs[from] != ctx->vregs[to]) { ctx->cfg_blocks[b].flags &= ~IR_BB_EMPTY; ctx->cfg_blocks[b].flags |= IR_BB_DESSA_MOVES; - ctx->flags |= IR_LR_HAVE_DESSA_MOVES; + ctx->flags2 |= IR_LR_HAVE_DESSA_MOVES; #if 0 fprintf(stderr, "BB%d: MOV %d -> %d\n", b, from, to); #endif @@ -1980,7 +1980,7 @@ int ir_compute_dessa_moves(ir_ctx *ctx) int pred = ctx->cfg_edges[bb->predecessors + (j-2)]; ctx->cfg_blocks[pred].flags &= ~IR_BB_EMPTY; ctx->cfg_blocks[pred].flags |= IR_BB_DESSA_MOVES; - ctx->flags |= IR_LR_HAVE_DESSA_MOVES; + ctx->flags2 |= IR_LR_HAVE_DESSA_MOVES; } } } @@ -2295,7 +2295,7 @@ static ir_live_interval *ir_split_interval_at(ir_ctx *ctx, ir_live_interval *iva IR_LOG_LSRA_SPLIT(ival, pos); IR_ASSERT(pos > ival->range.start); - ctx->flags |= IR_RA_HAVE_SPLITS; + ctx->flags2 |= IR_RA_HAVE_SPLITS; p = &ival->range; prev = NULL; @@ -2883,7 +2883,7 @@ static ir_reg ir_allocate_blocked_reg(ir_ctx *ctx, ir_live_interval *ival, ir_li if (!use_pos) { /* spill */ IR_LOG_LSRA(" ---- Spill", ival, " (no use pos that must be in reg)"); - ctx->flags |= IR_RA_HAVE_SPILLS; + ctx->flags2 |= IR_RA_HAVE_SPILLS; return IR_REG_NONE; } next_use_pos = use_pos->pos; @@ -3333,7 +3333,7 @@ static int ir_linear_scan(ir_ctx *ctx) return 0; } - if (ctx->flags & IR_LR_HAVE_DESSA_MOVES) { + if (ctx->flags2 & IR_LR_HAVE_DESSA_MOVES) { /* Add fixed intervals for temporary registers used for DESSA moves */ for (b = 1, bb = &ctx->cfg_blocks[1]; b <= ctx->cfg_blocks_count; b++, bb++) { IR_ASSERT(!(bb->flags & IR_BB_UNREACHABLE)); @@ -3385,7 +3385,7 @@ static int ir_linear_scan(ir_ctx *ctx) } } - ctx->flags &= ~(IR_RA_HAVE_SPLITS|IR_RA_HAVE_SPILLS); + ctx->flags2 &= ~(IR_RA_HAVE_SPLITS|IR_RA_HAVE_SPILLS); #ifdef IR_DEBUG if (ctx->flags & IR_DEBUG_RA) { @@ -3499,7 +3499,7 @@ static int ir_linear_scan(ir_ctx *ctx) } #endif - if (ctx->flags & (IR_RA_HAVE_SPLITS|IR_RA_HAVE_SPILLS)) { + if (ctx->flags2 & (IR_RA_HAVE_SPLITS|IR_RA_HAVE_SPILLS)) { if (ctx->binding) { ir_assign_bound_spill_slots(ctx); @@ -3674,7 +3674,7 @@ static void assign_regs(ir_ctx *ctx) memset(ctx->regs, IR_REG_NONE, sizeof(ir_regs) * ctx->insns_count); } - if (!(ctx->flags & (IR_RA_HAVE_SPLITS|IR_RA_HAVE_SPILLS))) { + if (!(ctx->flags2 & (IR_RA_HAVE_SPLITS|IR_RA_HAVE_SPILLS))) { for (i = 1; i <= ctx->vregs_count; i++) { ival = ctx->live_intervals[i]; if (ival) { diff --git a/ir_sccp.c b/ir_sccp.c index 6c0297f..808b015 100644 --- a/ir_sccp.c +++ b/ir_sccp.c @@ -545,7 +545,7 @@ int ir_sccp(ir_ctx *ctx) ir_bitqueue worklist; ir_insn *_values = ir_mem_calloc(ctx->insns_count, sizeof(ir_insn)); - ctx->flags |= IR_OPT_IN_SCCP; + ctx->flags2 |= IR_OPT_IN_SCCP; /* A bit modified SCCP algorithm of M. N. Wegman and F. K. Zadeck */ ir_bitqueue_init(&worklist, ctx->insns_count); @@ -878,8 +878,8 @@ int ir_sccp(ir_ctx *ctx) ir_mem_free(_values); ir_bitqueue_free(&worklist); - ctx->flags &= ~IR_OPT_IN_SCCP; - ctx->flags |= IR_SCCP_DONE; + ctx->flags2 &= ~IR_OPT_IN_SCCP; + ctx->flags2 |= IR_SCCP_DONE; return 1; } diff --git a/ir_x86.dasc b/ir_x86.dasc index 1d7dc8f..68f2933 100644 --- a/ir_x86.dasc +++ b/ir_x86.dasc @@ -1423,7 +1423,7 @@ binop_fp: } break; case IR_CALL: - ctx->flags |= IR_HAS_CALLS; + ctx->flags2 |= IR_HAS_CALLS; IR_FALLTHROUGH; case IR_TAILCALL: if (ir_in_same_block(ctx, insn->op2)) { @@ -1435,9 +1435,10 @@ binop_fp: case IR_PARAM: return ctx->use_lists[ref].count > 0 ? IR_PARAM : IR_SKIPPED | IR_PARAM; case IR_ALLOCA: - /* alloca() may be use only in functions */ + /* alloca() may be used only in functions */ if (ctx->flags & IR_FUNCTION) { - ctx->flags |= IR_USE_FRAME_POINTER | IR_HAS_ALLOCA; + ctx->flags |= IR_USE_FRAME_POINTER; + ctx->flags2 |= IR_HAS_ALLOCA; } return IR_ALLOCA; case IR_VSTORE: @@ -6144,7 +6145,7 @@ static void ir_emit_alloca(ir_ctx *ctx, ir_ref def, ir_insn *insn) IR_ASSERT(IR_IS_TYPE_UNSIGNED(val->type) || val->val.i64 > 0); IR_ASSERT(IR_IS_SIGNED_32BIT(val->val.i64)); - if (ctx->flags & IR_HAS_CALLS) { + if (ctx->flags2 & IR_HAS_CALLS) { /* Stack must be 16 byte aligned */ size = IR_ALIGNED_SIZE(size, 16); } else { @@ -6155,7 +6156,7 @@ static void ir_emit_alloca(ir_ctx *ctx, ir_ref def, ir_insn *insn) ctx->call_stack_size += size; } } else { - int32_t alignment = (ctx->flags & IR_HAS_CALLS) ? 16 : 8; + int32_t alignment = (ctx->flags2 & IR_HAS_CALLS) ? 16 : 8; ir_reg op2_reg = ctx->regs[def][2]; ir_type type = ctx->ir_base[insn->op2].type; @@ -6201,7 +6202,7 @@ static void ir_emit_afree(ir_ctx *ctx, ir_ref def, ir_insn *insn) IR_ASSERT(IR_IS_TYPE_UNSIGNED(val->type) || val->val.i64 > 0); IR_ASSERT(IR_IS_SIGNED_32BIT(val->val.i64)); - if (ctx->flags & IR_HAS_CALLS) { + if (ctx->flags2 & IR_HAS_CALLS) { /* Stack must be 16 byte aligned */ size = IR_ALIGNED_SIZE(size, 16); } else { @@ -6212,7 +6213,7 @@ static void ir_emit_afree(ir_ctx *ctx, ir_ref def, ir_insn *insn) ctx->call_stack_size -= size; } } else { -// int32_t alignment = (ctx->flags & IR_HAS_CALLS) ? 16 : 8; +// int32_t alignment = (ctx->flags2 & IR_HAS_CALLS) ? 16 : 8; ir_reg op2_reg = ctx->regs[def][2]; ir_type type = ctx->ir_base[insn->op2].type; @@ -8509,7 +8510,7 @@ void ir_fix_stack_frame(ir_ctx *ctx) ctx->stack_frame_alignment = 0; ctx->call_stack_size = 0; - if (ctx->flags & IR_HAS_CALLS) { + if (ctx->flags2 & IR_HAS_CALLS) { /* Stack must be 16 byte aligned */ if (!(ctx->flags & IR_FUNCTION)) { while (IR_ALIGNED_SIZE(ctx->stack_frame_size, 16) != ctx->stack_frame_size) {