mirror of
https://github.com/danog/ir.git
synced 2025-01-22 05:31:32 +01:00
Take into account spill slot size and alignment
This commit is contained in:
Dmitry Stogov
parent
49374df65c
commit
6fb5380906
@ -288,7 +288,7 @@ void ir_dump_live_ranges(ir_ctx *ctx, FILE *f)
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}
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}
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fprintf(f, ")");
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if (ival->stack_spill_pos) {
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if (ival->stack_spill_pos != -1) {
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fprintf(f, " [SPILL=0x%x]", ival->stack_spill_pos);
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}
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}
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36
ir_ra.c
36
ir_ra.c
@ -69,7 +69,7 @@ static void ir_add_local_var(ir_ctx *ctx, int v, uint8_t type)
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ival->reg = IR_REG_NONE;
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ival->flags = IR_LIVE_INTERVAL_VAR;
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ival->vreg = v;
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ival->stack_spill_pos = 0; // not allocated
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ival->stack_spill_pos = -1; // not allocated
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ival->range.start = 0;
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ival->range.end = ctx->insns_count;
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ival->range.next = NULL;
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@ -93,7 +93,7 @@ static void ir_add_live_range(ir_ctx *ctx, int v, uint8_t type, ir_live_pos star
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ival->reg = IR_REG_NONE;
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ival->flags = 0;
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ival->vreg = v;
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ival->stack_spill_pos = 0; // not allocated
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ival->stack_spill_pos = -1; // not allocated
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ival->range.start = start;
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ival->range.end = end;
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ival->range.next = NULL;
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@ -165,7 +165,7 @@ static void ir_add_fixed_live_range(ir_ctx *ctx, ir_reg reg, ir_live_pos start,
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ival->reg = reg;
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ival->flags = IR_LIVE_INTERVAL_FIXED;
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ival->vreg = v;
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ival->stack_spill_pos = 0; // not allocated
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ival->stack_spill_pos = -1; // not allocated
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ival->range.start = start;
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ival->range.end = end;
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ival->range.next = NULL;
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@ -188,7 +188,7 @@ static void ir_add_tmp(ir_ctx *ctx, ir_ref ref, ir_tmp_reg tmp_reg)
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ival->reg = IR_REG_NONE;
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ival->flags = IR_LIVE_INTERVAL_TEMP | tmp_reg.num;
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ival->vreg = 0;
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ival->stack_spill_pos = 0; // not allocated
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ival->stack_spill_pos = -1; // not allocated
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ival->range.start = IR_START_LIVE_POS_FROM_REF(ref) + tmp_reg.start;
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ival->range.end = IR_START_LIVE_POS_FROM_REF(ref) + tmp_reg.end;
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ival->range.next = NULL;
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@ -1091,7 +1091,8 @@ int ir_gen_dessa_moves(ir_ctx *ctx, int b, emit_copy_t emit_copy)
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* Christian Wimmer VEE'10 (2005), Figure 2.
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*/
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typedef struct _ir_lsra_data {
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uint32_t stack_frame_size;
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int32_t stack_frame_size;
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int32_t unused_slot;
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} ir_lsra_data;
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#ifdef IR_DEBUG
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@ -1324,7 +1325,7 @@ static ir_live_interval *ir_split_interval_at(ir_ctx *ctx, ir_live_interval *iva
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child->reg = IR_REG_NONE;
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child->flags = 0;
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child->vreg = ival->vreg;
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child->stack_spill_pos = 0; // not allocated
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child->stack_spill_pos = -1; // not allocated
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child->range.start = pos;
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child->range.end = p->end;
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child->range.next = p->next;
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@ -1360,9 +1361,21 @@ static ir_live_interval *ir_split_interval_at(ir_ctx *ctx, ir_live_interval *iva
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static void ir_allocate_spill_slot(ir_ctx *ctx, ir_live_interval *ival, ir_lsra_data *data)
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{
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ival = ival->top;
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if (ival->stack_spill_pos == 0) {
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data->stack_frame_size += 8; // ir_type_size[insn->type]; // TODO: alignment
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if (ival->stack_spill_pos == -1) {
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IR_ASSERT(ival->type != IR_VOID);
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uint8_t size = ir_type_size[ival->type];
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if (size == 8) {
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ival->stack_spill_pos = data->stack_frame_size;
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data->stack_frame_size += 8;
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} else if (data->unused_slot) {
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ival->stack_spill_pos = data->unused_slot;
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data->unused_slot = 0;
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} else {
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ival->stack_spill_pos = data->stack_frame_size;
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data->stack_frame_size += 4;
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data->unused_slot = data->stack_frame_size;
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data->stack_frame_size += 4;
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}
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}
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}
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@ -1887,6 +1900,7 @@ static int ir_linear_scan(ir_ctx *ctx)
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ctx->data = &data;
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data.stack_frame_size = 0;
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data.unused_slot = 0;
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for (j = 1; j <= ctx->vregs_count; j++) {
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ival = ctx->live_intervals[j];
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@ -1982,7 +1996,7 @@ static int ir_linear_scan(ir_ctx *ctx)
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ir_insn *var = &ctx->ir_base[insn->op2];
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IR_ASSERT(var->op == IR_VAR);
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if (strcmp(ir_get_str(ctx, var->op2), "_spill_") == 0) {
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if (ctx->live_intervals[ctx->vregs[insn->op2]]->stack_spill_pos) {
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if (ctx->live_intervals[ctx->vregs[insn->op2]]->stack_spill_pos != -1) {
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ival->stack_spill_pos =
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ctx->live_intervals[ctx->vregs[insn->op2]]->stack_spill_pos;
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} else {
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@ -1999,7 +2013,7 @@ static int ir_linear_scan(ir_ctx *ctx)
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ir_insn *var = &ctx->ir_base[insn->op2];
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IR_ASSERT(var->op == IR_VAR);
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if (strcmp(ir_get_str(ctx, var->op2), "_spill_") == 0) {
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if (ctx->live_intervals[ctx->vregs[insn->op2]]->stack_spill_pos) {
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if (ctx->live_intervals[ctx->vregs[insn->op2]]->stack_spill_pos != -1) {
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ival->stack_spill_pos =
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ctx->live_intervals[ctx->vregs[insn->op2]]->stack_spill_pos;
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} else {
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@ -2072,7 +2086,7 @@ static void assign_regs(ir_ctx *ctx)
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use_pos = ival->use_pos;
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while (use_pos) {
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reg = ival->reg;
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if (ival->top->stack_spill_pos){
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if (ival->top->stack_spill_pos != -1) {
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// TODO: Insert spill loads and stotres in optimal positons (resolution)
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if (use_pos->op_num == 0) {
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56
ir_x86.dasc
56
ir_x86.dasc
@ -404,6 +404,7 @@
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typedef struct _ir_backend_data {
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int32_t stack_frame_size;
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int32_t unused_slot;
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int32_t stack_frame_alignment;
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ir_regset used_preserved_regs;
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uint32_t dessa_from_block;
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@ -1459,11 +1460,11 @@ static ir_reg ir_ref_spill_slot(ir_ctx *ctx, ir_ref ref)
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IR_ASSERT(ref >= 0);
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offset = ctx->live_intervals[ctx->vregs[ref]]->stack_spill_pos;
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IR_ASSERT(offset != 0);
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IR_ASSERT(offset != -1);
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if (ctx->flags & IR_USE_FRAME_POINTER) {
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return offset - data->stack_frame_size - data->stack_frame_alignment - sizeof(void*);
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return offset - data->stack_frame_size - data->stack_frame_alignment;
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} else {
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return offset + data->stack_frame_alignment - sizeof(void*);
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return offset + data->stack_frame_alignment;
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}
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}
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@ -1520,12 +1521,12 @@ static void ir_emit_load(ir_ctx *ctx, ir_type type, ir_reg reg, ir_ref src)
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}
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} else {
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offset = ctx->live_intervals[ctx->vregs[src]]->stack_spill_pos;
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IR_ASSERT(offset != 0);
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IR_ASSERT(offset != -1);
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if (ctx->flags & IR_USE_FRAME_POINTER) {
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offset = offset - data->stack_frame_size - data->stack_frame_alignment - sizeof(void*);
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offset = offset - data->stack_frame_size - data->stack_frame_alignment;
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fp = IR_REG_RBP;
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} else {
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offset = offset + data->stack_frame_alignment - sizeof(void*);
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offset = offset + data->stack_frame_alignment;
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fp = IR_REG_RSP;
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}
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@ -1546,12 +1547,12 @@ static void ir_emit_store(ir_ctx *ctx, ir_type type, ir_ref dst, ir_reg reg)
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IR_ASSERT(dst >= 0);
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offset = ctx->live_intervals[ctx->vregs[dst]]->stack_spill_pos;
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IR_ASSERT(offset != 0);
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IR_ASSERT(offset != -1);
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if (ctx->flags & IR_USE_FRAME_POINTER) {
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offset = offset - data->stack_frame_size - data->stack_frame_alignment - sizeof(void*);
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offset = offset - data->stack_frame_size - data->stack_frame_alignment;
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fp = IR_REG_RBP;
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} else {
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offset = offset + data->stack_frame_alignment - sizeof(void*);
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offset = offset + data->stack_frame_alignment;
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fp = IR_REG_RSP;
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}
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@ -1571,6 +1572,7 @@ static bool ir_is_same_mem(ir_ctx *ctx, ir_ref r1, ir_ref r2)
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}
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o1 = ctx->live_intervals[ctx->vregs[r1]]->stack_spill_pos;
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o2 = ctx->live_intervals[ctx->vregs[r2]]->stack_spill_pos;
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IR_ASSERT(o1 != -1 && o2 != -1);
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return o1 == o2 && o1;
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}
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@ -3999,6 +4001,24 @@ static int ir_fix_dessa_tmps(ir_ctx *ctx, uint8_t type, ir_ref from, ir_ref to)
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return 1;
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}
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static void ir_allocate_spill_slot(ir_ctx *ctx, ir_live_interval *ival, ir_backend_data *data)
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{
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IR_ASSERT(ival->type != IR_VOID);
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uint8_t size = ir_type_size[ival->type];
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if (size == 8) {
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ival->stack_spill_pos = data->stack_frame_size;
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data->stack_frame_size += 8;
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} else if (data->unused_slot) {
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ival->stack_spill_pos = data->unused_slot;
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data->unused_slot = 0;
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} else {
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ival->stack_spill_pos = data->stack_frame_size;
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data->stack_frame_size += 4;
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data->unused_slot = data->stack_frame_size;
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data->stack_frame_size += 4;
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}
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}
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static void ir_allocate_unique_spill_slots(ir_ctx *ctx)
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{
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int b;
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@ -4049,7 +4069,7 @@ static void ir_allocate_unique_spill_slots(ir_ctx *ctx)
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if (ir_get_use_flags(ctx, i, 0) & IR_USE_MUST_BE_IN_REG) {
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if (insn->op == IR_VLOAD
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&& ctx->live_intervals[ctx->vregs[i]]
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&& ctx->live_intervals[ctx->vregs[i]]->stack_spill_pos) {
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&& ctx->live_intervals[ctx->vregs[i]]->stack_spill_pos != -1) {
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/* pass */
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} else {
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ir_reg reg = ir_get_free_reg(insn->type, available);
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@ -4063,13 +4083,13 @@ static void ir_allocate_unique_spill_slots(ir_ctx *ctx)
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ival->type = insn->type;
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ival->reg = IR_REG_NONE;
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ival->vreg = ctx->vregs[i];
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data->stack_frame_size += 8; // ir_type_size[insn->type]; // TODO: alignment
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ival->stack_spill_pos = data->stack_frame_size;
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ir_allocate_spill_slot(ctx, ival, data);
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ival->top = ival;
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if (insn->op == IR_VAR) {
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ir_use_list *use_list = &ctx->use_lists[i];
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ir_reg i, n, *p, use;
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ir_insn *use_insn;
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int32_t stack_spill_pos = ival->stack_spill_pos;
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n = use_list->count;
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for (i = 0, p = &ctx->use_edges[use_list->refs]; i < n; i++, p++) {
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@ -4083,7 +4103,7 @@ static void ir_allocate_unique_spill_slots(ir_ctx *ctx)
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ival->type = insn->type;
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ival->reg = IR_REG_NONE;
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ival->vreg = ctx->vregs[use];
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ival->stack_spill_pos = data->stack_frame_size;
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ival->stack_spill_pos = stack_spill_pos;
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ival->top = ival;
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}
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} else if (use_insn->op == IR_VSTORE) {
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@ -4095,7 +4115,7 @@ static void ir_allocate_unique_spill_slots(ir_ctx *ctx)
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ival->type = insn->type;
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ival->reg = IR_REG_NONE;
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ival->vreg = ctx->vregs[insn->op3];
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ival->stack_spill_pos = data->stack_frame_size;
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ival->stack_spill_pos = stack_spill_pos;
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ival->top = ival;
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}
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}
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@ -4206,9 +4226,9 @@ static void ir_calc_stack_frame_size(ir_ctx *ctx, ir_backend_data *data)
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for (i = 1, p = ctx->live_intervals + i; i <= ctx->vregs_count; i++, p++) {
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ival = *p;
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if (ival) {
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if (ival->stack_spill_pos) {
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if (ival->stack_spill_pos > data->stack_frame_size) {
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data->stack_frame_size = ival->stack_spill_pos;
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if (ival->stack_spill_pos != -1) {
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if (ival->stack_spill_pos + ir_type_size[ival->type] > data->stack_frame_size) {
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data->stack_frame_size = ival->stack_spill_pos + ir_type_size[ival->type];
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}
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}
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if (ival->reg >= 0) {
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@ -4220,6 +4240,7 @@ static void ir_calc_stack_frame_size(ir_ctx *ctx, ir_backend_data *data)
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}
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}
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}
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data->stack_frame_size = IR_ALIGNED_SIZE(data->stack_frame_size, 8);
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data->stack_frame_size += additional_size;
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if (ctx->flags & IR_HAS_CALLS) {
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@ -4254,6 +4275,7 @@ void *ir_emit(ir_ctx *ctx, size_t *size)
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ctx->data = &data;
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data.stack_frame_size = 0;
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data.unused_slot = 0;
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data.stack_frame_alignment = 0;
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data.used_preserved_regs = 0;
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data.rodata_label = 0;
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@ -66,123 +66,123 @@ Fig -O0
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}
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--EXPECT--
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test:
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subq $0x128, %rsp
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subq $0x98, %rsp
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movl %edi, (%rsp)
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movl %esi, 8(%rsp)
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movl %edx, 0x10(%rsp)
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movl %ecx, 0x18(%rsp)
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movl %r9d, 0x20(%rsp)
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movl %esi, 4(%rsp)
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movl %edx, 8(%rsp)
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movl %ecx, 0xc(%rsp)
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movl %r9d, 0x10(%rsp)
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movl -8(%rsp), %eax
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movl %eax, 0x28(%rsp)
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movl %eax, 0x14(%rsp)
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movl -8(%rsp), %eax
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movl %eax, 0x30(%rsp)
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movl %eax, 0x18(%rsp)
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movl -8(%rsp), %eax
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movl %eax, 0x38(%rsp)
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movl %eax, 0x1c(%rsp)
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movl -8(%rsp), %eax
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movl %eax, 0x40(%rsp)
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movl %eax, 0x20(%rsp)
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movl (%rsp), %eax
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movl %eax, 0x48(%rsp)
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movl %eax, 0x24(%rsp)
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movl 0xc(%rsp), %eax
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movl %eax, 0x28(%rsp)
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movl 0x10(%rsp), %eax
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movl %eax, 0x2c(%rsp)
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movl 0x14(%rsp), %eax
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movl %eax, 0x30(%rsp)
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movl 0x18(%rsp), %eax
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movl %eax, 0x50(%rsp)
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movl 0x20(%rsp), %eax
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movl %eax, 0x58(%rsp)
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movl %eax, 0x34(%rsp)
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.L1:
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cmpl $0, 0x1c(%rsp)
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je .L2
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movl 8(%rsp), %eax
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imull 4(%rsp), %eax
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movl %eax, 0x38(%rsp)
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movl 0x38(%rsp), %eax
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addl $4, %eax
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movl %eax, 0x3c(%rsp)
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movl 8(%rsp), %eax
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movl %eax, 0x40(%rsp)
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movl 0x40(%rsp), %eax
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movl %eax, 0x54(%rsp)
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movl 0x28(%rsp), %eax
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movl %eax, 0x58(%rsp)
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movl 0x38(%rsp), %eax
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movl %eax, 0x5c(%rsp)
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movl 0x3c(%rsp), %eax
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movl %eax, 0x60(%rsp)
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movl 0x30(%rsp), %eax
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movl %eax, 0x64(%rsp)
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movl 0x34(%rsp), %eax
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movl %eax, 0x68(%rsp)
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.L1:
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cmpl $0, 0x38(%rsp)
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je .L2
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movl 0x10(%rsp), %eax
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imull 8(%rsp), %eax
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movl %eax, 0x70(%rsp)
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movl 0x70(%rsp), %eax
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addl $4, %eax
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movl %eax, 0x78(%rsp)
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movl 0x10(%rsp), %eax
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movl %eax, 0x80(%rsp)
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movl 0x80(%rsp), %eax
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movl %eax, 0xa8(%rsp)
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movl 0x50(%rsp), %eax
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movl %eax, 0xb0(%rsp)
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movl 0x70(%rsp), %eax
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movl %eax, 0xb8(%rsp)
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movl 0x78(%rsp), %eax
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movl %eax, 0xc0(%rsp)
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movl 0x60(%rsp), %eax
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movl %eax, 0xc8(%rsp)
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movl 0x68(%rsp), %eax
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movl %eax, 0xd0(%rsp)
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jmp .L3
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.L2:
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movl 0x10(%rsp), %eax
|
||||
movl %eax, 0x88(%rsp)
|
||||
movl 0x88(%rsp), %eax
|
||||
imull 8(%rsp), %eax
|
||||
movl %eax, 0x90(%rsp)
|
||||
movl 0x48(%rsp), %eax
|
||||
imull 8(%rsp), %eax
|
||||
movl %eax, 0x98(%rsp)
|
||||
movl 0x98(%rsp), %eax
|
||||
addl $1, %eax
|
||||
movl %eax, 0xa0(%rsp)
|
||||
movl 0x48(%rsp), %eax
|
||||
movl %eax, 0xa8(%rsp)
|
||||
movl 0x88(%rsp), %eax
|
||||
movl %eax, 0xb0(%rsp)
|
||||
movl 0x90(%rsp), %eax
|
||||
movl %eax, 0xb8(%rsp)
|
||||
movl 0x58(%rsp), %eax
|
||||
movl %eax, 0xc0(%rsp)
|
||||
movl 0x98(%rsp), %eax
|
||||
movl %eax, 0xc8(%rsp)
|
||||
movl 0xa0(%rsp), %eax
|
||||
movl %eax, 0xd0(%rsp)
|
||||
.L3:
|
||||
movl 0xa8(%rsp), %eax
|
||||
imull 8(%rsp), %eax
|
||||
movl %eax, 0xd8(%rsp)
|
||||
movl 0xd8(%rsp), %eax
|
||||
addl $1, %eax
|
||||
movl %eax, 0xe0(%rsp)
|
||||
cmpl $0, 0x40(%rsp)
|
||||
je .L4
|
||||
movl 0xa8(%rsp), %eax
|
||||
movl 8(%rsp), %eax
|
||||
movl %eax, 0x44(%rsp)
|
||||
movl 0x44(%rsp), %eax
|
||||
imull 4(%rsp), %eax
|
||||
movl %eax, 0x48(%rsp)
|
||||
movl 0xb0(%rsp), %eax
|
||||
movl 0x24(%rsp), %eax
|
||||
imull 4(%rsp), %eax
|
||||
movl %eax, 0x4c(%rsp)
|
||||
movl 0x4c(%rsp), %eax
|
||||
addl $1, %eax
|
||||
movl %eax, 0x50(%rsp)
|
||||
movl 0xc0(%rsp), %eax
|
||||
movl 0x24(%rsp), %eax
|
||||
movl %eax, 0x54(%rsp)
|
||||
movl 0x44(%rsp), %eax
|
||||
movl %eax, 0x58(%rsp)
|
||||
movl 0xc8(%rsp), %eax
|
||||
movl 0x48(%rsp), %eax
|
||||
movl %eax, 0x5c(%rsp)
|
||||
movl 0x2c(%rsp), %eax
|
||||
movl %eax, 0x60(%rsp)
|
||||
movl 0xd0(%rsp), %eax
|
||||
movl 0x4c(%rsp), %eax
|
||||
movl %eax, 0x64(%rsp)
|
||||
movl 0x50(%rsp), %eax
|
||||
movl %eax, 0x68(%rsp)
|
||||
.L3:
|
||||
movl 0x54(%rsp), %eax
|
||||
imull 4(%rsp), %eax
|
||||
movl %eax, 0x6c(%rsp)
|
||||
movl 0x6c(%rsp), %eax
|
||||
addl $1, %eax
|
||||
movl %eax, 0x70(%rsp)
|
||||
cmpl $0, 0x20(%rsp)
|
||||
je .L4
|
||||
movl 0x54(%rsp), %eax
|
||||
movl %eax, 0x24(%rsp)
|
||||
movl 0x58(%rsp), %eax
|
||||
movl %eax, 0x28(%rsp)
|
||||
movl 0x60(%rsp), %eax
|
||||
movl %eax, 0x2c(%rsp)
|
||||
movl 0x64(%rsp), %eax
|
||||
movl %eax, 0x30(%rsp)
|
||||
movl 0x68(%rsp), %eax
|
||||
movl %eax, 0x34(%rsp)
|
||||
jmp .L1
|
||||
.L4:
|
||||
movl 0xa8(%rsp), %eax
|
||||
movl 0x54(%rsp), %eax
|
||||
addl 4(%rsp), %eax
|
||||
movl %eax, 0x74(%rsp)
|
||||
movl 0x74(%rsp), %eax
|
||||
addl 8(%rsp), %eax
|
||||
movl %eax, 0xe8(%rsp)
|
||||
movl 0xe8(%rsp), %eax
|
||||
addl 0x10(%rsp), %eax
|
||||
movl %eax, 0xf0(%rsp)
|
||||
movl 0xf0(%rsp), %eax
|
||||
addl 0xb0(%rsp), %eax
|
||||
movl %eax, 0xf8(%rsp)
|
||||
movl 0xf8(%rsp), %eax
|
||||
addl 0xb8(%rsp), %eax
|
||||
movl %eax, 0x100(%rsp)
|
||||
movl 0x100(%rsp), %eax
|
||||
addl 0xc0(%rsp), %eax
|
||||
movl %eax, 0x108(%rsp)
|
||||
movl 0x108(%rsp), %eax
|
||||
addl 0xc8(%rsp), %eax
|
||||
movl %eax, 0x110(%rsp)
|
||||
movl 0x110(%rsp), %eax
|
||||
addl 0xd0(%rsp), %eax
|
||||
movl %eax, 0x118(%rsp)
|
||||
movl 0x118(%rsp), %eax
|
||||
addl 0xe0(%rsp), %eax
|
||||
movl %eax, 0x120(%rsp)
|
||||
movl 0x120(%rsp), %eax
|
||||
addq $0x128, %rsp
|
||||
movl %eax, 0x78(%rsp)
|
||||
movl 0x78(%rsp), %eax
|
||||
addl 0x58(%rsp), %eax
|
||||
movl %eax, 0x7c(%rsp)
|
||||
movl 0x7c(%rsp), %eax
|
||||
addl 0x5c(%rsp), %eax
|
||||
movl %eax, 0x80(%rsp)
|
||||
movl 0x80(%rsp), %eax
|
||||
addl 0x60(%rsp), %eax
|
||||
movl %eax, 0x84(%rsp)
|
||||
movl 0x84(%rsp), %eax
|
||||
addl 0x64(%rsp), %eax
|
||||
movl %eax, 0x88(%rsp)
|
||||
movl 0x88(%rsp), %eax
|
||||
addl 0x68(%rsp), %eax
|
||||
movl %eax, 0x8c(%rsp)
|
||||
movl 0x8c(%rsp), %eax
|
||||
addl 0x70(%rsp), %eax
|
||||
movl %eax, 0x90(%rsp)
|
||||
movl 0x90(%rsp), %eax
|
||||
addq $0x98, %rsp
|
||||
retq
|
||||
|
||||
@ -53,7 +53,7 @@ Mandelbrot Test (-O0)
|
||||
}
|
||||
--EXPECT--
|
||||
test:
|
||||
subq $0x78, %rsp
|
||||
subq $0x70, %rsp
|
||||
movsd %xmm0, (%rsp)
|
||||
movsd %xmm1, 8(%rsp)
|
||||
movsd 8(%rsp), %xmm0
|
||||
@ -67,50 +67,50 @@ test:
|
||||
.L1:
|
||||
movl 0x28(%rsp), %eax
|
||||
addl $1, %eax
|
||||
movl %eax, 0x30(%rsp)
|
||||
movl %eax, 0x2c(%rsp)
|
||||
movsd 0x20(%rsp), %xmm0
|
||||
mulsd 0x18(%rsp), %xmm0
|
||||
movsd %xmm0, 0x38(%rsp)
|
||||
movsd %xmm0, 0x30(%rsp)
|
||||
movsd 0x20(%rsp), %xmm0
|
||||
mulsd %xmm0, %xmm0
|
||||
movsd %xmm0, 0x40(%rsp)
|
||||
movsd %xmm0, 0x38(%rsp)
|
||||
movsd 0x18(%rsp), %xmm0
|
||||
mulsd %xmm0, %xmm0
|
||||
movsd %xmm0, 0x48(%rsp)
|
||||
movsd 0x40(%rsp), %xmm0
|
||||
subsd 0x48(%rsp), %xmm0
|
||||
movsd %xmm0, 0x50(%rsp)
|
||||
movsd 0x50(%rsp), %xmm0
|
||||
addsd 0x10(%rsp), %xmm0
|
||||
movsd %xmm0, 0x58(%rsp)
|
||||
movsd %xmm0, 0x40(%rsp)
|
||||
movsd 0x38(%rsp), %xmm0
|
||||
addsd %xmm0, %xmm0
|
||||
movsd %xmm0, 0x60(%rsp)
|
||||
movsd 0x60(%rsp), %xmm0
|
||||
addsd (%rsp), %xmm0
|
||||
movsd %xmm0, 0x68(%rsp)
|
||||
subsd 0x40(%rsp), %xmm0
|
||||
movsd %xmm0, 0x48(%rsp)
|
||||
movsd 0x48(%rsp), %xmm0
|
||||
addsd 0x40(%rsp), %xmm0
|
||||
movsd %xmm0, 0x70(%rsp)
|
||||
movsd 0x70(%rsp), %xmm0
|
||||
addsd 0x10(%rsp), %xmm0
|
||||
movsd %xmm0, 0x50(%rsp)
|
||||
movsd 0x30(%rsp), %xmm0
|
||||
addsd %xmm0, %xmm0
|
||||
movsd %xmm0, 0x58(%rsp)
|
||||
movsd 0x58(%rsp), %xmm0
|
||||
addsd (%rsp), %xmm0
|
||||
movsd %xmm0, 0x60(%rsp)
|
||||
movsd 0x40(%rsp), %xmm0
|
||||
addsd 0x38(%rsp), %xmm0
|
||||
movsd %xmm0, 0x68(%rsp)
|
||||
movsd 0x68(%rsp), %xmm0
|
||||
ucomisd 0x4f(%rip), %xmm0
|
||||
ja .L2
|
||||
jmp .L3
|
||||
.L2:
|
||||
movl 0x30(%rsp), %eax
|
||||
addq $0x78, %rsp
|
||||
movl 0x2c(%rsp), %eax
|
||||
addq $0x70, %rsp
|
||||
retq
|
||||
.L3:
|
||||
cmpl $0x3e8, 0x30(%rsp)
|
||||
cmpl $0x3e8, 0x2c(%rsp)
|
||||
jl .L4
|
||||
xorl %eax, %eax
|
||||
addq $0x78, %rsp
|
||||
addq $0x70, %rsp
|
||||
retq
|
||||
.L4:
|
||||
movsd 0x68(%rsp), %xmm0
|
||||
movsd 0x60(%rsp), %xmm0
|
||||
movsd %xmm0, 0x18(%rsp)
|
||||
movsd 0x58(%rsp), %xmm0
|
||||
movsd 0x50(%rsp), %xmm0
|
||||
movsd %xmm0, 0x20(%rsp)
|
||||
movl 0x30(%rsp), %eax
|
||||
movl 0x2c(%rsp), %eax
|
||||
movl %eax, 0x28(%rsp)
|
||||
jmp .L1
|
||||
|
||||
@ -73,11 +73,11 @@ Mandelbrot Test (var)
|
||||
}
|
||||
--EXPECT--
|
||||
test:
|
||||
subq $0xa0, %rsp
|
||||
subq $0x98, %rsp
|
||||
movsd %xmm0, (%rsp)
|
||||
movsd %xmm1, 8(%rsp)
|
||||
movsd 8(%rsp), %xmm0
|
||||
subsd 0x168(%rip), %xmm0
|
||||
subsd 0x160(%rip), %xmm0
|
||||
movsd %xmm0, 0x18(%rsp)
|
||||
movsd 0x18(%rsp), %xmm0
|
||||
movsd %xmm0, 0x10(%rsp)
|
||||
@ -91,56 +91,56 @@ test:
|
||||
.L1:
|
||||
movl 0x38(%rsp), %eax
|
||||
addl $1, %eax
|
||||
movl %eax, 0x40(%rsp)
|
||||
movl 0x40(%rsp), %eax
|
||||
movl %eax, 0x3c(%rsp)
|
||||
movl 0x3c(%rsp), %eax
|
||||
movl %eax, 0x38(%rsp)
|
||||
movsd 0x30(%rsp), %xmm0
|
||||
mulsd 0x28(%rsp), %xmm0
|
||||
movsd %xmm0, 0x50(%rsp)
|
||||
movsd 0x50(%rsp), %xmm0
|
||||
movsd %xmm0, 0x48(%rsp)
|
||||
movsd 0x48(%rsp), %xmm0
|
||||
movsd %xmm0, 0x40(%rsp)
|
||||
movsd 0x30(%rsp), %xmm0
|
||||
mulsd %xmm0, %xmm0
|
||||
movsd %xmm0, 0x60(%rsp)
|
||||
movsd 0x60(%rsp), %xmm0
|
||||
movsd %xmm0, 0x58(%rsp)
|
||||
movsd 0x58(%rsp), %xmm0
|
||||
movsd %xmm0, 0x50(%rsp)
|
||||
movsd 0x28(%rsp), %xmm0
|
||||
mulsd %xmm0, %xmm0
|
||||
movsd %xmm0, 0x68(%rsp)
|
||||
movsd 0x68(%rsp), %xmm0
|
||||
movsd %xmm0, 0x60(%rsp)
|
||||
movsd 0x50(%rsp), %xmm0
|
||||
subsd 0x60(%rsp), %xmm0
|
||||
movsd %xmm0, 0x70(%rsp)
|
||||
movsd 0x70(%rsp), %xmm0
|
||||
movsd %xmm0, 0x68(%rsp)
|
||||
movsd 0x58(%rsp), %xmm0
|
||||
subsd 0x68(%rsp), %xmm0
|
||||
addsd 0x10(%rsp), %xmm0
|
||||
movsd %xmm0, 0x78(%rsp)
|
||||
movsd 0x78(%rsp), %xmm0
|
||||
addsd 0x10(%rsp), %xmm0
|
||||
movsd %xmm0, 0x30(%rsp)
|
||||
movsd 0x40(%rsp), %xmm0
|
||||
addsd %xmm0, %xmm0
|
||||
movsd %xmm0, 0x80(%rsp)
|
||||
movsd 0x80(%rsp), %xmm0
|
||||
movsd %xmm0, 0x30(%rsp)
|
||||
movsd 0x48(%rsp), %xmm0
|
||||
addsd %xmm0, %xmm0
|
||||
addsd 0x20(%rsp), %xmm0
|
||||
movsd %xmm0, 0x88(%rsp)
|
||||
movsd 0x88(%rsp), %xmm0
|
||||
addsd 0x20(%rsp), %xmm0
|
||||
movsd %xmm0, 0x28(%rsp)
|
||||
movsd 0x60(%rsp), %xmm0
|
||||
addsd 0x50(%rsp), %xmm0
|
||||
movsd %xmm0, 0x90(%rsp)
|
||||
movsd 0x90(%rsp), %xmm0
|
||||
movsd %xmm0, 0x28(%rsp)
|
||||
movsd 0x68(%rsp), %xmm0
|
||||
addsd 0x58(%rsp), %xmm0
|
||||
movsd %xmm0, 0x98(%rsp)
|
||||
movsd 0x98(%rsp), %xmm0
|
||||
ucomisd 0x38(%rip), %xmm0
|
||||
ucomisd 0x36(%rip), %xmm0
|
||||
ja .L2
|
||||
jmp .L3
|
||||
.L2:
|
||||
movl 0x38(%rsp), %eax
|
||||
addq $0xa0, %rsp
|
||||
addq $0x98, %rsp
|
||||
retq
|
||||
.L3:
|
||||
cmpl $0x3e8, 0x38(%rsp)
|
||||
jl .L4
|
||||
xorl %eax, %eax
|
||||
addq $0xa0, %rsp
|
||||
addq $0x98, %rsp
|
||||
retq
|
||||
.L4:
|
||||
jmp .L1
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user