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DynAsm/ARM64: Temporary fix for "LSL Rx(dst), Rd(src), #imm" encoding

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This commit is contained in:
Dmitry Stogov 2022-06-02 13:40:50 +03:00
parent bb842b489c
commit 77e5e4a62c
1 changed files with 3 additions and 3 deletions
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6
dynasm/dasm_arm64.lua
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@ -248,7 +248,7 @@ local map_cond = {
local parse_reg_type
local function parse_reg(expr, shift)
local function parse_reg(expr, shift, skip_vreg)
if not expr then werror("expected register name") end
local tname, ovreg = match(expr, "^([%w_]+):(@?%l%d+)$")
if not tname then
@ -281,7 +281,7 @@ local function parse_reg(expr, shift)
elseif parse_reg_type ~= vrt then
werror("register size mismatch")
end
if shift then waction("VREG", shift, vreg) end
if not skip_vreg then waction("VREG", shift, vreg) end
return 0
end
werror("bad register name `"..expr.."'")
@ -649,7 +649,7 @@ local function alias_bfiz(p)
end
local alias_lslimm = op_alias("ubfm_4", function(p)
parse_reg(p[1], 0)
parse_reg(p[1], 0, true)
local sh = p[3]:sub(2)
if parse_reg_type == "w" then
p[3] = "#(32-("..sh.."))%32"