diff --git a/TODO b/TODO
index f68e398..402034c 100644
--- a/TODO
+++ b/TODO
@@ -18,24 +18,22 @@
 ?  instruction selection
 	- xor, btsl=INCL, btrl=EXCL, btl=IN, bsr
     - MOVZX to avoid a SHIFT and AND instruction
-    - Use CMOVcc to remove branches
     - BURS ???
 
 ?  register allocation
 	-  hints and low priority registers (prevent allocating registers that are used as hints
 	   tests/x86/ra_015.irt, tests/x86/combo_004.irt tests/x86/min_005.ir, tests/x86/min_006.irt)
 	-  spill slot coalescing
-	-  optimal spill code placement through resolution
-	-  splinting (spill only at cold path if possible)
+	-  optimisation of spill code placement (BB local or through resolution)
 	-  separate INT and FP allocation phases (for performance)
 
 ?  code generation
 	-  COND
 	?  32-bit x86 back-end
-		- ABS_INT incorrect register allocation (tests/x86/abs_001.irt)
+	-  ABS_INT incorrect register allocation (tests/x86/abs_001.irt)
 	-  TAILCALL with stack arguments (tests/x86/tailcall_001.itr)
 	-  32-bit x86 back-end 64-bit integers support
-		(add_009.irt, conv_001.irt, conv_002.irt, conv_004.irt, conv_007.irt, conv_010.irt, sub_009.irt)
+		(add_009.irt, conv_001.irt, conv_002.irt, conv_004.irt, conv_010.irt, sub_009.irt)
 	-  binary code emission without DynAsm ???
 
 -  modules (functions, data objecs, import, export, prototypes, forward declarations, memory segments, ref data, expr data)