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Split IR_LIVE_INTERVAL_HAS_HINTS into IR_LIVE_INTERVAL_HAS_HINT_REGS and
IR_LIVE_INTERVAL_HAS_HINT_REFS
This commit is contained in:
parent
3dcb083eb6
commit
b6517f2028
15
ir_private.h
15
ir_private.h
@ -1011,13 +1011,14 @@ struct _ir_live_range {
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#define IR_LIVE_INTERVAL_TEMP (1<<1)
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#define IR_LIVE_INTERVAL_VAR (1<<2)
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#define IR_LIVE_INTERVAL_COALESCED (1<<3)
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#define IR_LIVE_INTERVAL_HAS_HINTS (1<<4)
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#define IR_LIVE_INTERVAL_MEM_PARAM (1<<5)
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#define IR_LIVE_INTERVAL_MEM_LOAD (1<<6)
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#define IR_LIVE_INTERVAL_REG_LOAD (1<<7)
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#define IR_LIVE_INTERVAL_SPILL_SPECIAL (1<<8) /* spill slot is pre-allocated in a special area (see ir_ctx.spill_reserved_base) */
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#define IR_LIVE_INTERVAL_SPILLED (1<<9)
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#define IR_LIVE_INTERVAL_SPLIT_CHILD (1<<10)
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#define IR_LIVE_INTERVAL_HAS_HINT_REGS (1<<4)
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#define IR_LIVE_INTERVAL_HAS_HINT_REFS (1<<5)
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#define IR_LIVE_INTERVAL_MEM_PARAM (1<<6)
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#define IR_LIVE_INTERVAL_MEM_LOAD (1<<7)
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#define IR_LIVE_INTERVAL_REG_LOAD (1<<8)
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#define IR_LIVE_INTERVAL_SPILL_SPECIAL (1<<9) /* spill slot is pre-allocated in a special area (see ir_ctx.spill_reserved_base) */
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#define IR_LIVE_INTERVAL_SPILLED (1<<10)
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#define IR_LIVE_INTERVAL_SPLIT_CHILD (1<<11)
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struct _ir_live_interval {
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uint8_t type;
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58
ir_ra.c
58
ir_ra.c
@ -383,8 +383,11 @@ IR_ALWAYS_INLINE void ir_add_use(ir_ctx *ctx, ir_live_interval *ival, int op_num
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use_pos->hint_ref = hint_ref;
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use_pos->pos = pos;
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if (hint != IR_REG_NONE || hint_ref > 0) {
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ival->flags |= IR_LIVE_INTERVAL_HAS_HINTS;
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if (hint != IR_REG_NONE) {
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ival->flags |= IR_LIVE_INTERVAL_HAS_HINT_REGS;
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}
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if (hint_ref > 0) {
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ival->flags |= IR_LIVE_INTERVAL_HAS_HINT_REFS;
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}
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ir_add_use_pos(ctx, ival, use_pos);
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@ -1600,10 +1603,8 @@ static void ir_vregs_join(ir_ctx *ctx, uint32_t r1, uint32_t r2)
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use_pos = use_pos->next;
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}
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if (ival->flags & IR_LIVE_INTERVAL_HAS_HINTS) {
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ctx->live_intervals[r1]->flags |= IR_LIVE_INTERVAL_HAS_HINTS;
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}
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ctx->live_intervals[r1]->flags |= IR_LIVE_INTERVAL_COALESCED;
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ctx->live_intervals[r1]->flags |=
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IR_LIVE_INTERVAL_COALESCED | (ival->flags & (IR_LIVE_INTERVAL_HAS_HINT_REGS|IR_LIVE_INTERVAL_HAS_HINT_REFS));
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ctx->live_intervals[r2] = NULL;
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// TODO: remember to reuse ???
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@ -2313,19 +2314,25 @@ static ir_live_interval *ir_split_interval_at(ir_ctx *ctx, ir_live_interval *iva
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use_pos = ival->use_pos;
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prev_use_pos = NULL;
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ival->flags &= ~IR_LIVE_INTERVAL_HAS_HINTS;
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ival->flags &= ~(IR_LIVE_INTERVAL_HAS_HINT_REGS|IR_LIVE_INTERVAL_HAS_HINT_REFS);
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if (p->start == pos) {
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while (use_pos && pos > use_pos->pos) {
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if (use_pos->hint != IR_REG_NONE || use_pos->hint_ref > 0) {
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ival->flags |= IR_LIVE_INTERVAL_HAS_HINTS;
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if (use_pos->hint != IR_REG_NONE) {
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ival->flags |= IR_LIVE_INTERVAL_HAS_HINT_REGS;
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}
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if (use_pos->hint_ref > 0) {
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ival->flags |= IR_LIVE_INTERVAL_HAS_HINT_REFS;
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}
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prev_use_pos = use_pos;
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use_pos = use_pos->next;
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}
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} else {
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while (use_pos && pos >= use_pos->pos) {
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if (use_pos->hint != IR_REG_NONE || use_pos->hint_ref > 0) {
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ival->flags |= IR_LIVE_INTERVAL_HAS_HINTS;
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if (use_pos->hint != IR_REG_NONE) {
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ival->flags |= IR_LIVE_INTERVAL_HAS_HINT_REGS;
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}
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if (use_pos->hint_ref > 0) {
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ival->flags |= IR_LIVE_INTERVAL_HAS_HINT_REFS;
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}
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prev_use_pos = use_pos;
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use_pos = use_pos->next;
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@ -2365,8 +2372,11 @@ static ir_live_interval *ir_split_interval_at(ir_ctx *ctx, ir_live_interval *iva
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use_pos = child->use_pos;
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while (use_pos) {
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if (use_pos->hint != IR_REG_NONE || use_pos->hint_ref > 0) {
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child->flags |= IR_LIVE_INTERVAL_HAS_HINTS;
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if (use_pos->hint != IR_REG_NONE) {
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child->flags |= IR_LIVE_INTERVAL_HAS_HINT_REGS;
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}
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if (use_pos->hint_ref > 0) {
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child->flags |= IR_LIVE_INTERVAL_HAS_HINT_REFS;
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}
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use_pos = use_pos->next;
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}
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@ -2449,6 +2459,7 @@ static ir_reg ir_try_allocate_preferred_reg(ir_ctx *ctx, ir_live_interval *ival,
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ir_use_pos *use_pos;
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ir_reg reg;
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if (ival->flags & IR_LIVE_INTERVAL_HAS_HINT_REGS) {
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use_pos = ival->use_pos;
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while (use_pos) {
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reg = use_pos->hint;
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@ -2460,7 +2471,9 @@ static ir_reg ir_try_allocate_preferred_reg(ir_ctx *ctx, ir_live_interval *ival,
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}
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use_pos = use_pos->next;
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}
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}
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if (ival->flags & IR_LIVE_INTERVAL_HAS_HINT_REFS) {
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use_pos = ival->use_pos;
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while (use_pos) {
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if (use_pos->hint_ref > 0) {
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@ -2474,6 +2487,7 @@ static ir_reg ir_try_allocate_preferred_reg(ir_ctx *ctx, ir_live_interval *ival,
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}
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use_pos = use_pos->next;
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}
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}
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return IR_REG_NONE;
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}
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@ -2507,8 +2521,8 @@ static void ir_add_to_unhandled(ir_live_interval **unhandled, ir_live_interval *
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if (*unhandled == NULL
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|| pos < (*unhandled)->range.start
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|| (pos == (*unhandled)->range.start
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&& (ival->flags & IR_LIVE_INTERVAL_HAS_HINTS)
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&& !((*unhandled)->flags & IR_LIVE_INTERVAL_HAS_HINTS))
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&& (ival->flags & (IR_LIVE_INTERVAL_HAS_HINT_REGS|IR_LIVE_INTERVAL_HAS_HINT_REFS))
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&& !((*unhandled)->flags & (IR_LIVE_INTERVAL_HAS_HINT_REGS|IR_LIVE_INTERVAL_HAS_HINT_REFS)))
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|| (pos == (*unhandled)->range.start
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&& ival->vreg > (*unhandled)->vreg)) {
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ival->list_next = *unhandled;
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@ -2519,8 +2533,8 @@ static void ir_add_to_unhandled(ir_live_interval **unhandled, ir_live_interval *
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while (prev->list_next) {
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if (pos < prev->list_next->range.start
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|| (pos == prev->list_next->range.start
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&& (ival->flags & IR_LIVE_INTERVAL_HAS_HINTS)
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&& !(prev->list_next->flags & IR_LIVE_INTERVAL_HAS_HINTS))
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&& (ival->flags & (IR_LIVE_INTERVAL_HAS_HINT_REGS|IR_LIVE_INTERVAL_HAS_HINT_REFS))
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&& !(prev->list_next->flags & (IR_LIVE_INTERVAL_HAS_HINT_REGS|IR_LIVE_INTERVAL_HAS_HINT_REFS)))
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|| (pos == prev->list_next->range.start
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&& ival->vreg > prev->list_next->vreg)) {
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break;
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@ -2682,7 +2696,7 @@ static ir_reg ir_try_allocate_free_reg(ir_ctx *ctx, ir_live_interval *ival, ir_l
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other = other->list_next;
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}
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if (ival->flags & IR_LIVE_INTERVAL_HAS_HINTS) {
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if (ival->flags & (IR_LIVE_INTERVAL_HAS_HINT_REGS|IR_LIVE_INTERVAL_HAS_HINT_REFS)) {
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/* Try to use hint */
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reg = ir_try_allocate_preferred_reg(ctx, ival, available, freeUntilPos);
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if (reg != IR_REG_NONE) {
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@ -2742,7 +2756,7 @@ static ir_reg ir_try_allocate_free_reg(ir_ctx *ctx, ir_live_interval *ival, ir_l
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if (split_pos > ival->range.start) {
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split_pos = ir_find_optimal_split_position(ctx, ival, split_pos, pos, 0);
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other = ir_split_interval_at(ctx, ival, split_pos);
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if (ival->flags & IR_LIVE_INTERVAL_HAS_HINTS) {
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if (ival->flags & (IR_LIVE_INTERVAL_HAS_HINT_REGS|IR_LIVE_INTERVAL_HAS_HINT_REFS)) {
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ir_reg pref_reg = ir_try_allocate_preferred_reg(ctx, ival, available, freeUntilPos);
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if (pref_reg != IR_REG_NONE) {
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@ -2909,7 +2923,7 @@ static ir_reg ir_allocate_blocked_reg(ir_ctx *ctx, ir_live_interval *ival, ir_li
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/* register hinting */
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reg = IR_REG_NONE;
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if (ival->flags & IR_LIVE_INTERVAL_HAS_HINTS) {
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if (ival->flags & (IR_LIVE_INTERVAL_HAS_HINT_REGS|IR_LIVE_INTERVAL_HAS_HINT_REFS)) {
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reg = ir_get_preferred_reg(ctx, ival, available);
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}
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if (reg == IR_REG_NONE) {
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@ -3571,6 +3585,7 @@ static void ir_add_hint(ir_ctx *ctx, ir_ref ref, ir_live_pos pos, ir_reg hint)
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if (use_pos->pos == pos) {
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if (use_pos->hint == IR_REG_NONE) {
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use_pos->hint = hint;
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ival->flags |= IR_LIVE_INTERVAL_HAS_HINT_REGS;
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}
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}
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use_pos = use_pos->next;
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@ -3586,7 +3601,8 @@ static void ir_hint_propagation(ir_ctx *ctx)
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for (i = 1; i <= ctx->vregs_count; i++) {
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ival = ctx->live_intervals[i];
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if (ival) {
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if (ival
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&& (ival->flags & (IR_LIVE_INTERVAL_HAS_HINT_REGS|IR_LIVE_INTERVAL_HAS_HINT_REFS)) == (IR_LIVE_INTERVAL_HAS_HINT_REGS|IR_LIVE_INTERVAL_HAS_HINT_REFS)) {
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use_pos = ival->use_pos;
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hint_use_pos = NULL;
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while (use_pos) {
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