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Merge spills for VSTORE with -O0

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This commit is contained in:
Dmitry Stogov 2022-05-18 23:12:20 +03:00
parent c5a24ff734
commit cdd39f22b0
2 changed files with 38 additions and 50 deletions
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10
ir_x86.dasc
View File

@ -3399,7 +3399,8 @@ static void ir_emit_vstore_int(ir_ctx *ctx, ir_ref ref, ir_insn *insn)
int32_t offset;
ir_reg fp;
if (op3_reg == IR_REG_NONE && !IR_IS_CONST_REF(insn->op3) && ir_is_same_mem(ctx, insn->op3, insn->op2)) {
if ((op3_reg == IR_REG_NONE || (op3_reg & IR_REG_SPILL_LOAD))
&& !IR_IS_CONST_REF(insn->op3) && ir_is_same_mem(ctx, insn->op3, insn->op2)) {
return; // fake store
}
if (IR_IS_CONST_REF(insn->op3) && IR_IS_32BIT(type, val_insn->val)) {
@ -3424,7 +3425,8 @@ static void ir_emit_vstore_fp(ir_ctx *ctx, ir_ref ref, ir_insn *insn)
ir_ref type = ctx->ir_base[insn->op3].type;
ir_reg op3_reg = ctx->regs[ref][3];
if (op3_reg == IR_REG_NONE && !IR_IS_CONST_REF(insn->op3) && ir_is_same_mem(ctx, insn->op3, insn->op2)) {
if ((op3_reg == IR_REG_NONE || (op3_reg & IR_REG_SPILL_LOAD))
&& !IR_IS_CONST_REF(insn->op3) && ir_is_same_mem(ctx, insn->op3, insn->op2)) {
return; // fake store
}
IR_ASSERT(op3_reg != IR_REG_NONE);
@ -4566,7 +4568,7 @@ static void ir_allocate_unique_spill_slots(ir_ctx *ctx)
ival->top = ival;
if (insn->op == IR_VAR) {
ir_use_list *use_list = &ctx->use_lists[i];
ir_reg i, n, *p, use;
ir_ref i, n, *p, use;
ir_insn *use_insn;
int32_t stack_spill_pos = ival->stack_spill_pos;
@ -4590,7 +4592,7 @@ static void ir_allocate_unique_spill_slots(ir_ctx *ctx)
&& ctx->vregs[use_insn->op3]
&& !ctx->live_intervals[ctx->vregs[use_insn->op3]]) {
ir_live_interval *ival = ir_mem_calloc(1, sizeof(ir_live_interval));
ctx->live_intervals[ctx->vregs[insn->op3]] = ival;
ctx->live_intervals[ctx->vregs[use_insn->op3]] = ival;
ival->type = insn->type;
ival->reg = IR_REG_NONE;
ival->vreg = ctx->vregs[insn->op3];

78
tests/debug/test_var-O0.irt
View File

@ -73,74 +73,60 @@ Mandelbrot Test (var)
}
--EXPECT--
test:
subq $0x98, %rsp
subq $0x68, %rsp
movsd %xmm0, (%rsp)
movsd %xmm1, 8(%rsp)
movsd 8(%rsp), %xmm0
subsd 0x160(%rip), %xmm0
movsd %xmm0, 0x18(%rsp)
movsd 0x18(%rsp), %xmm0
subsd 0xf3(%rip), %xmm0
movsd %xmm0, 0x10(%rsp)
movsd (%rsp), %xmm0
movsd %xmm0, 0x18(%rsp)
xorpd %xmm0, %xmm0
movsd %xmm0, 0x20(%rsp)
xorpd %xmm0, %xmm0
movsd %xmm0, 0x28(%rsp)
xorpd %xmm0, %xmm0
movsd %xmm0, 0x30(%rsp)
movl $0, 0x38(%rsp)
movl $0, 0x30(%rsp)
.L1:
movl 0x38(%rsp), %eax
movl 0x30(%rsp), %eax
addl $1, %eax
movl %eax, 0x3c(%rsp)
movl 0x3c(%rsp), %eax
movl %eax, 0x38(%rsp)
movsd 0x30(%rsp), %xmm0
mulsd 0x28(%rsp), %xmm0
movsd %xmm0, 0x48(%rsp)
movsd 0x48(%rsp), %xmm0
movsd %xmm0, 0x40(%rsp)
movsd 0x30(%rsp), %xmm0
mulsd %xmm0, %xmm0
movsd %xmm0, 0x58(%rsp)
movsd 0x58(%rsp), %xmm0
movsd %xmm0, 0x50(%rsp)
movl %eax, 0x30(%rsp)
movsd 0x28(%rsp), %xmm0
mulsd 0x20(%rsp), %xmm0
movsd %xmm0, 0x38(%rsp)
movsd 0x28(%rsp), %xmm0
mulsd %xmm0, %xmm0
movsd %xmm0, 0x68(%rsp)
movsd 0x68(%rsp), %xmm0
movsd %xmm0, 0x60(%rsp)
movsd 0x50(%rsp), %xmm0
subsd 0x60(%rsp), %xmm0
movsd %xmm0, 0x70(%rsp)
movsd 0x70(%rsp), %xmm0
addsd 0x10(%rsp), %xmm0
movsd %xmm0, 0x78(%rsp)
movsd 0x78(%rsp), %xmm0
movsd %xmm0, 0x30(%rsp)
movsd %xmm0, 0x40(%rsp)
movsd 0x20(%rsp), %xmm0
mulsd %xmm0, %xmm0
movsd %xmm0, 0x48(%rsp)
movsd 0x40(%rsp), %xmm0
addsd %xmm0, %xmm0
movsd %xmm0, 0x80(%rsp)
movsd 0x80(%rsp), %xmm0
addsd 0x20(%rsp), %xmm0
movsd %xmm0, 0x88(%rsp)
movsd 0x88(%rsp), %xmm0
subsd 0x48(%rsp), %xmm0
movsd %xmm0, 0x50(%rsp)
movsd 0x50(%rsp), %xmm0
addsd 0x10(%rsp), %xmm0
movsd %xmm0, 0x28(%rsp)
movsd 0x38(%rsp), %xmm0
addsd %xmm0, %xmm0
movsd %xmm0, 0x58(%rsp)
movsd 0x58(%rsp), %xmm0
addsd 0x18(%rsp), %xmm0
movsd %xmm0, 0x20(%rsp)
movsd 0x48(%rsp), %xmm0
addsd 0x40(%rsp), %xmm0
movsd %xmm0, 0x60(%rsp)
movsd 0x60(%rsp), %xmm0
addsd 0x50(%rsp), %xmm0
movsd %xmm0, 0x90(%rsp)
movsd 0x90(%rsp), %xmm0
ucomisd 0x36(%rip), %xmm0
ucomisd 0x2b(%rip), %xmm0
ja .L2
jmp .L3
.L2:
movl 0x38(%rsp), %eax
addq $0x98, %rsp
movl 0x30(%rsp), %eax
addq $0x68, %rsp
retq
.L3:
cmpl $0x3e8, 0x38(%rsp)
cmpl $0x3e8, 0x30(%rsp)
jl .L4
xorl %eax, %eax
addq $0x98, %rsp
addq $0x68, %rsp
retq
.L4:
jmp .L1