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Improve x86 code generation for passing address of label to stack

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-       leal .L1, %eax
-       movl %eax, (%esp)
+       movl $.L1, (%esp)
This commit is contained in:
Dmitry Stogov 2023-03-29 15:48:41 +03:00
parent 5bed3d73a5
commit d79bd88f6f
13 changed files with 36 additions and 38 deletions
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6
ir_disasm.c
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@ -243,6 +243,12 @@ static uint64_t ir_disasm_rodata_reference(csh cs, const cs_insn *insn)
} }
} }
} }
if (insn->id == X86_INS_MOV
&& insn->detail->x86.op_count == 2
&& insn->detail->x86.operands[0].type == X86_OP_IMM
&& insn->detail->x86.operands[0].size == sizeof(void*)) {
return (uint32_t)insn->detail->x86.operands[0].imm;
}
#elif defined(IR_TARGET_X64) #elif defined(IR_TARGET_X64)
unsigned int i; unsigned int i;

10
ir_x86.dasc
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@ -19,10 +19,10 @@
#define IR_IS_UNSIGNED_32BIT(val) (((uintptr_t)(val)) <= 0xffffffff) #define IR_IS_UNSIGNED_32BIT(val) (((uintptr_t)(val)) <= 0xffffffff)
#define IR_IS_32BIT(type, val) (IR_IS_TYPE_SIGNED(type) ? IR_IS_SIGNED_32BIT((val).i64) : IR_IS_UNSIGNED_32BIT((val).u64)) #define IR_IS_32BIT(type, val) (IR_IS_TYPE_SIGNED(type) ? IR_IS_SIGNED_32BIT((val).i64) : IR_IS_UNSIGNED_32BIT((val).u64))
#define IR_IS_FP_ZERO(insn) ((insn.type == IR_DOUBLE) ? (insn.val.u64 == 0) : (insn.val.u32 == 0)) #define IR_IS_FP_ZERO(insn) ((insn.type == IR_DOUBLE) ? (insn.val.u64 == 0) : (insn.val.u32 == 0))
#define IR_MAY_USE_32BIT_ADDR(a) \ #define IR_MAY_USE_32BIT_ADDR(addr) \
(ctx->code_buffer && \ (ctx->code_buffer && \
IR_IS_SIGNED_32BIT((char*)addr - (char*)ctx->code_buffer) && \ IR_IS_SIGNED_32BIT((char*)(addr) - (char*)ctx->code_buffer) && \
IR_IS_SIGNED_32BIT((char*)addr - ((char*)ctx->code_buffer + ctx->code_buffer_size))) IR_IS_SIGNED_32BIT((char*)(addr) - ((char*)ctx->code_buffer + ctx->code_buffer_size)))
#define IR_SPILL_POS_TO_OFFSET(offset) \ #define IR_SPILL_POS_TO_OFFSET(offset) \
((ctx->flags & IR_USE_FRAME_POINTER) ? \ ((ctx->flags & IR_USE_FRAME_POINTER) ? \
@ -6125,8 +6125,12 @@ static int32_t ir_emit_arguments(ir_ctx *ctx, ir_ref def, ir_insn *insn, ir_reg
val_insn->const_flags |= IR_CONST_EMIT; val_insn->const_flags |= IR_CONST_EMIT;
IR_ASSERT(tmp_reg != IR_REG_NONE); IR_ASSERT(tmp_reg != IR_REG_NONE);
|.if X64
| lea Ra(tmp_reg), aword [=>label] | lea Ra(tmp_reg), aword [=>label]
| mov [Ra(IR_REG_RSP)+stack_offset], Ra(tmp_reg) | mov [Ra(IR_REG_RSP)+stack_offset], Ra(tmp_reg)
|.else
| mov [Ra(IR_REG_RSP)+stack_offset], =>label
|.endif
} else if (IR_IS_SIGNED_32BIT(val_insn->val.i64)) { } else if (IR_IS_SIGNED_32BIT(val_insn->val.i64)) {
if (ir_type_size[type] <= 4) { if (ir_type_size[type] <= 4) {
| mov dword [Ra(IR_REG_RSP)+stack_offset], val_insn->val.i32 | mov dword [Ra(IR_REG_RSP)+stack_offset], val_insn->val.i32

5
tests/debug.x86/args_001.irt
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@ -25,8 +25,7 @@ x86
--EXPECT-- --EXPECT--
test: test:
subl $0x2c, %esp subl $0x2c, %esp
leal .L1, %eax movl $.L1, (%esp)
movl %eax, (%esp)
movl $1, 4(%esp) movl $1, 4(%esp)
movl $2, 8(%esp) movl $2, 8(%esp)
movl $3, 0xc(%esp) movl $3, 0xc(%esp)
@ -41,7 +40,7 @@ test:
addl $0x2c, %esp addl $0x2c, %esp
retl retl
.rodata .rodata
.db 0x90, 0x90, 0x90 .db 0x90, 0x90, 0x90, 0x90, 0x90
.L1: .L1:
.db 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25 .db 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25
.db 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x0a, 0x00 .db 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x0a, 0x00

5
tests/debug.x86/args_002.irt
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@ -25,8 +25,7 @@ x86
--EXPECT-- --EXPECT--
test: test:
subl $0x5c, %esp subl $0x5c, %esp
leal .L10, %eax movl $.L10, (%esp)
movl %eax, (%esp)
movsd .L1, %xmm7 movsd .L1, %xmm7
movsd %xmm7, 4(%esp) movsd %xmm7, 4(%esp)
movsd .L2, %xmm7 movsd .L2, %xmm7
@ -51,7 +50,7 @@ test:
addl $0x5c, %esp addl $0x5c, %esp
retl retl
.rodata .rodata
.db 0x90, 0x90, 0x90 .db 0x90, 0x90, 0x90, 0x90, 0x90
.L1: .L1:
.db 0x9a, 0x99, 0x99, 0x99, 0x99, 0x99, 0xb9, 0x3f .db 0x9a, 0x99, 0x99, 0x99, 0x99, 0x99, 0xb9, 0x3f
.L2: .L2:

5
tests/debug.x86/call-O0.irt
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@ -20,8 +20,7 @@ x86
test: test:
subl $0xc, %esp subl $0xc, %esp
subl $0x10, %esp subl $0x10, %esp
leal .L1, %ecx movl $.L1, (%esp)
movl %ecx, (%esp)
movl $0x2a, 4(%esp) movl $0x2a, 4(%esp)
calll printf calll printf
addl $0x10, %esp addl $0x10, %esp
@ -30,7 +29,7 @@ test:
addl $0xc, %esp addl $0xc, %esp
retl retl
.rodata .rodata
.db 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90 .db 0x90
.L1: .L1:
.db 0x68, 0x65, 0x6c, 0x6c, 0x6f, 0x20, 0x25, 0x64, 0x21, 0x0a, 0x00 .db 0x68, 0x65, 0x6c, 0x6c, 0x6f, 0x20, 0x25, 0x64, 0x21, 0x0a, 0x00

5
tests/debug.x86/call.irt
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@ -19,14 +19,13 @@ x86
--EXPECT-- --EXPECT--
test: test:
subl $0xc, %esp subl $0xc, %esp
leal .L1, %eax movl $.L1, (%esp)
movl %eax, (%esp)
movl $0x2a, 4(%esp) movl $0x2a, 4(%esp)
calll printf calll printf
addl $0xc, %esp addl $0xc, %esp
retl retl
.rodata .rodata
.db 0x90, 0x90, 0x90 .db 0x90, 0x90, 0x90, 0x90, 0x90
.L1: .L1:
.db 0x68, 0x65, 0x6c, 0x6c, 0x6f, 0x20, 0x25, 0x64, 0x21, 0x0a, 0x00 .db 0x68, 0x65, 0x6c, 0x6c, 0x6f, 0x20, 0x25, 0x64, 0x21, 0x0a, 0x00

5
tests/debug.x86/call2.irt
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@ -26,8 +26,7 @@ test:
subl $0x1c, %esp subl $0x1c, %esp
movl %ebx, 0x18(%esp) movl %ebx, 0x18(%esp)
movl 0x20(%esp), %ebx movl 0x20(%esp), %ebx
leal .L1, %eax movl $.L1, (%esp)
movl %eax, (%esp)
movl 0x28(%esp), %eax movl 0x28(%esp), %eax
movl %eax, 4(%esp) movl %eax, 4(%esp)
movl 0x2c(%esp), %eax movl 0x2c(%esp), %eax
@ -40,6 +39,6 @@ test:
addl $0x1c, %esp addl $0x1c, %esp
retl retl
.rodata .rodata
.db 0x90, 0x90, 0x90, 0x90, 0x90 .db 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90
.L1: .L1:
.db 0x68, 0x65, 0x6c, 0x6c, 0x6f, 0x20, 0x25, 0x64, 0x21, 0x0a, 0x00 .db 0x68, 0x65, 0x6c, 0x6c, 0x6f, 0x20, 0x25, 0x64, 0x21, 0x0a, 0x00

5
tests/debug.x86/call3.irt
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@ -24,8 +24,7 @@ test:
movl %ebx, 0x18(%esp) movl %ebx, 0x18(%esp)
movl 0x20(%esp), %ebx movl 0x20(%esp), %ebx
movl 0x30(%esp), %eax movl 0x30(%esp), %eax
leal .L1, %ecx movl $.L1, (%esp)
movl %ecx, (%esp)
movl 0x28(%esp), %ecx movl 0x28(%esp), %ecx
movl %ecx, 4(%esp) movl %ecx, 4(%esp)
movl 0x2c(%esp), %ecx movl 0x2c(%esp), %ecx
@ -38,6 +37,6 @@ test:
addl $0x1c, %esp addl $0x1c, %esp
retl retl
.rodata .rodata
.db 0x90, 0x90, 0x90, 0x90 .db 0x90, 0x90, 0x90, 0x90, 0x90, 0x90
.L1: .L1:
.db 0x68, 0x65, 0x6c, 0x6c, 0x6f, 0x20, 0x25, 0x64, 0x21, 0x0a, 0x00 .db 0x68, 0x65, 0x6c, 0x6c, 0x6f, 0x20, 0x25, 0x64, 0x21, 0x0a, 0x00

5
tests/debug.x86/call_002.irt
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@ -16,14 +16,13 @@ x86
--EXPECT-- --EXPECT--
test: test:
subl $0xc, %esp subl $0xc, %esp
leal .L1, %eax movl $.L1, (%esp)
movl %eax, (%esp)
movl 0x14(%esp), %eax movl 0x14(%esp), %eax
movl %eax, 4(%esp) movl %eax, 4(%esp)
calll *0x10(%esp) calll *0x10(%esp)
addl $0xc, %esp addl $0xc, %esp
retl retl
.rodata .rodata
.db 0x90, 0x90, 0x90, 0x90 .db 0x90, 0x90, 0x90, 0x90, 0x90, 0x90
.L1: .L1:
.db 0x68, 0x65, 0x6c, 0x6c, 0x6f, 0x20, 0x25, 0x64, 0x21, 0x0a, 0x00 .db 0x68, 0x65, 0x6c, 0x6c, 0x6f, 0x20, 0x25, 0x64, 0x21, 0x0a, 0x00

5
tests/debug.x86/params_003.irt
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@ -25,8 +25,7 @@ x86
--EXPECT-- --EXPECT--
test: test:
subl $0x2c, %esp subl $0x2c, %esp
leal .L1, %eax movl $.L1, (%esp)
movl %eax, (%esp)
movl 0x30(%esp), %eax movl 0x30(%esp), %eax
movl %eax, 4(%esp) movl %eax, 4(%esp)
movl 0x34(%esp), %eax movl 0x34(%esp), %eax
@ -51,7 +50,7 @@ test:
addl $0x2c, %esp addl $0x2c, %esp
retl retl
.rodata .rodata
.db 0x90, 0x90, 0x90 .db 0x90, 0x90, 0x90, 0x90, 0x90
.L1: .L1:
.db 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25 .db 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25
.db 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x0a, 0x00 .db 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x0a, 0x00

5
tests/debug.x86/regset-fib.irt
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@ -88,8 +88,7 @@ test:
movsd 0xc(%esp), %xmm0 movsd 0xc(%esp), %xmm0
subsd %xmm1, %xmm0 subsd %xmm1, %xmm0
movsd %xmm0, 0x14(%esp) movsd %xmm0, 0x14(%esp)
leal .L5, %eax movl $.L5, (%esp)
movl %eax, (%esp)
movsd 0x14(%esp), %xmm0 movsd 0x14(%esp), %xmm0
movsd %xmm0, 4(%esp) movsd %xmm0, 4(%esp)
calll printf calll printf
@ -100,7 +99,7 @@ test:
addl $0x1c, %esp addl $0x1c, %esp
retl retl
.rodata .rodata
.db 0x90 .db 0x90, 0x90, 0x90
.L3: .L3:
.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x3f .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x3f
.L4: .L4:

8
tests/debug.x86/regset-fib2.irt
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@ -89,13 +89,11 @@ test:
movsd 0xc(%esp), %xmm0 movsd 0xc(%esp), %xmm0
subsd %xmm1, %xmm0 subsd %xmm1, %xmm0
movsd %xmm0, 0x14(%esp) movsd %xmm0, 0x14(%esp)
leal .L5, %eax movl $.L5, (%esp)
movl %eax, (%esp)
movsd 0x14(%esp), %xmm0 movsd 0x14(%esp), %xmm0
movsd %xmm0, 4(%esp) movsd %xmm0, 4(%esp)
calll printf calll printf
leal .L5, %eax movl $.L5, (%esp)
movl %eax, (%esp)
movsd 0x14(%esp), %xmm7 movsd 0x14(%esp), %xmm7
movsd %xmm7, 4(%esp) movsd %xmm7, 4(%esp)
calll printf calll printf
@ -106,7 +104,7 @@ test:
addl $0x1c, %esp addl $0x1c, %esp
retl retl
.rodata .rodata
.db 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90 .db 0x90, 0x90, 0x90
.L3: .L3:
.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x3f .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x3f
.L4: .L4:

5
tests/debug.x86/regset-fibi.irt
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@ -74,8 +74,7 @@ test:
jge .L2 jge .L2
leal (%ebx, %eax), %ebp leal (%ebx, %eax), %ebp
movl %ebx, 4(%esp) movl %ebx, 4(%esp)
leal .L3, %eax movl $.L3, (%esp)
movl %eax, (%esp)
calll printf calll printf
movl %ebx, %eax movl %ebx, %eax
movl %ebp, %ebx movl %ebp, %ebx
@ -87,7 +86,7 @@ test:
addl $0x1c, %esp addl $0x1c, %esp
retl retl
.rodata .rodata
.db 0x90, 0x90, 0x90, 0x90, 0x90 .db 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90
.L3: .L3:
.db 0x25, 0x64, 0x0a, 0x00 .db 0x25, 0x64, 0x0a, 0x00