diff --git a/ir_x86.dasc b/ir_x86.dasc index 4162ae9..4619ea9 100644 --- a/ir_x86.dasc +++ b/ir_x86.dasc @@ -1634,12 +1634,12 @@ store_int: } else { ir_match_fuse_load(ctx, op1_insn->op2, bb); } - if (op1_insn->op == IR_AND && ctx->use_lists[insn->op1].count == 1) { + if (op1_insn->op == IR_AND && ctx->use_lists[op2_insn->op1].count == 1) { if (IR_IS_CONST_REF(op1_insn->op2)) { ir_match_fuse_load(ctx, op1_insn->op1, bb); } - ctx->rules[op2_insn->op1] = IR_TEST_INT; - ctx->rules[insn->op2] = IR_SKIP_CMP_INT; + ctx->rules[op2_insn->op1] = IR_SKIP_TEST_INT; + ctx->rules[insn->op2] = IR_SKIP; return IR_TEST_AND_BRANCH_INT; } else { ctx->rules[op2_insn->op1] = IR_BINOP_INT; diff --git a/tests/x86/test_003.irt b/tests/x86/test_003.irt new file mode 100644 index 0000000..6f0f2b3 --- /dev/null +++ b/tests/x86/test_003.irt @@ -0,0 +1,29 @@ +--TEST-- +003: IF(EQ(AND(_,_), 0)) -> TEST +--TARGET-- +x86 +--ARGS-- +-S +--CODE-- +{ + int32_t c1 = 0; + int32_t c2 = 3; + l_1 = START(ret); + int32_t x = PARAM(l_1, "x", 1); + int32_t d_1 = AND(x, c2); + bool d_2 = EQ(d_1, c1); + l_2 = IF(l_1, d_2); + l_3 = IF_TRUE(l_2); + ret1 = RETURN(l_3, c1); + l_5 = IF_FALSE(l_2); + ret = RETURN(l_5, c2, ret1); +} +--EXPECT-- +test: + testl $3, 4(%esp) + jne .L1 + xorl %eax, %eax + retl +.L1: + movl $3, %eax + retl diff --git a/tests/x86/test_004.irt b/tests/x86/test_004.irt new file mode 100644 index 0000000..cf917f4 --- /dev/null +++ b/tests/x86/test_004.irt @@ -0,0 +1,28 @@ +--TEST-- +004: IF(AND(_,_)) -> TEST +--TARGET-- +x86 +--ARGS-- +-S +--CODE-- +{ + int32_t c1 = 0; + int32_t c2 = 3; + l_1 = START(ret); + int32_t x = PARAM(l_1, "x", 1); + int32_t d_1 = AND(x, c2); + l_2 = IF(l_1, d_1); + l_3 = IF_TRUE(l_2); + ret1 = RETURN(l_3, c1); + l_5 = IF_FALSE(l_2); + ret = RETURN(l_5, c2, ret1); +} +--EXPECT-- +test: + testl $3, 4(%esp) + je .L1 + xorl %eax, %eax + retl +.L1: + movl $3, %eax + retl diff --git a/tests/x86_64/test_003.irt b/tests/x86_64/test_003.irt new file mode 100644 index 0000000..87a9944 --- /dev/null +++ b/tests/x86_64/test_003.irt @@ -0,0 +1,29 @@ +--TEST-- +003: IF(EQ(AND(_,_), 0)) -> TEST +--TARGET-- +x86_64 +--ARGS-- +-S +--CODE-- +{ + int32_t c1 = 0; + int32_t c2 = 3; + l_1 = START(ret); + int32_t x = PARAM(l_1, "x", 1); + int32_t d_1 = AND(x, c2); + bool d_2 = EQ(d_1, c1); + l_2 = IF(l_1, d_2); + l_3 = IF_TRUE(l_2); + ret1 = RETURN(l_3, c1); + l_5 = IF_FALSE(l_2); + ret = RETURN(l_5, c2, ret1); +} +--EXPECT-- +test: + testl $3, %edi + jne .L1 + xorl %eax, %eax + retq +.L1: + movl $3, %eax + retq diff --git a/tests/x86_64/test_004.irt b/tests/x86_64/test_004.irt new file mode 100644 index 0000000..a25204d --- /dev/null +++ b/tests/x86_64/test_004.irt @@ -0,0 +1,28 @@ +--TEST-- +004: IF(AND(_,_)) -> TEST +--TARGET-- +x86_64 +--ARGS-- +-S +--CODE-- +{ + int32_t c1 = 0; + int32_t c2 = 3; + l_1 = START(ret); + int32_t x = PARAM(l_1, "x", 1); + int32_t d_1 = AND(x, c2); + l_2 = IF(l_1, d_1); + l_3 = IF_TRUE(l_2); + ret1 = RETURN(l_3, c1); + l_5 = IF_FALSE(l_2); + ret = RETURN(l_5, c2, ret1); +} +--EXPECT-- +test: + testl $3, %edi + je .L1 + xorl %eax, %eax + retq +.L1: + movl $3, %eax + retq