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Remove usused IR_LIVE_INTERVAL_REG_LOAD flag
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@ -1015,10 +1015,9 @@ struct _ir_live_range {
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#define IR_LIVE_INTERVAL_HAS_HINT_REFS (1<<5)
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#define IR_LIVE_INTERVAL_HAS_HINT_REFS (1<<5)
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#define IR_LIVE_INTERVAL_MEM_PARAM (1<<6)
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#define IR_LIVE_INTERVAL_MEM_PARAM (1<<6)
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#define IR_LIVE_INTERVAL_MEM_LOAD (1<<7)
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#define IR_LIVE_INTERVAL_MEM_LOAD (1<<7)
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#define IR_LIVE_INTERVAL_REG_LOAD (1<<8)
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#define IR_LIVE_INTERVAL_SPILL_SPECIAL (1<<8) /* spill slot is pre-allocated in a special area (see ir_ctx.spill_reserved_base) */
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#define IR_LIVE_INTERVAL_SPILL_SPECIAL (1<<9) /* spill slot is pre-allocated in a special area (see ir_ctx.spill_reserved_base) */
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#define IR_LIVE_INTERVAL_SPILLED (1<<9)
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#define IR_LIVE_INTERVAL_SPILLED (1<<10)
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#define IR_LIVE_INTERVAL_SPLIT_CHILD (1<<10)
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#define IR_LIVE_INTERVAL_SPLIT_CHILD (1<<11)
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struct _ir_live_interval {
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struct _ir_live_interval {
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uint8_t type;
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uint8_t type;
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3
ir_ra.c
3
ir_ra.c
@ -3289,9 +3289,6 @@ static int ir_linear_scan(ir_ctx *ctx)
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if (ival) {
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if (ival) {
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if (ival->flags & IR_LIVE_INTERVAL_VAR) {
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if (ival->flags & IR_LIVE_INTERVAL_VAR) {
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/* pass */
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/* pass */
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} else if (ival->flags & IR_LIVE_INTERVAL_REG_LOAD) {
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/* pre-allocated fixed register */
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IR_ASSERT(IR_REGSET_IN(IR_REGSET_UNION(ctx->fixed_regset, IR_REGSET_FIXED), ival->reg));
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} else if (!(ival->flags & (IR_LIVE_INTERVAL_MEM_PARAM|IR_LIVE_INTERVAL_MEM_LOAD))
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} else if (!(ival->flags & (IR_LIVE_INTERVAL_MEM_PARAM|IR_LIVE_INTERVAL_MEM_LOAD))
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|| !ir_ival_spill_for_fuse_load(ctx, ival, &data)) {
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|| !ir_ival_spill_for_fuse_load(ctx, ival, &data)) {
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ir_add_to_unhandled(&unhandled, ival);
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ir_add_to_unhandled(&unhandled, ival);
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