Reload loading to avoid register clobbering

This commit is contained in:
Dmitry Stogov 2022-04-15 15:22:17 +03:00
parent 9f24f34aca
commit f04433999f
2 changed files with 28 additions and 0 deletions

View File

@ -1701,7 +1701,12 @@ void ir_emit_shift(ir_ctx *ctx, ir_ref def, ir_insn *insn)
} else {
reg = IR_REG_RAX; // TODO: temporary register
}
IR_ASSERT(reg != IR_REG_RCX);
if (op1_reg != reg) {
if (reg == op2_reg) {
ir_emit_load(ctx, insn->type, insn->op2, IR_REG_RCX);
op2_reg = IR_REG_RCX;
}
ir_emit_load(ctx, insn->type, insn->op1, reg);
}
if (op2_reg != IR_REG_RCX) {

23
tests/x86_64/ra_014.irt Normal file
View File

@ -0,0 +1,23 @@
--TEST--
014: Register Allocation (SHL + SHL)
--ARGS--
-S
--CODE--
{
l_1 = START(l_4);
uint32_t x = PARAM(l_1, "x", 1);
uint32_t y = PARAM(l_1, "y", 2);
uint32_t ret = SHL(x, y);
uint32_t ret2 = SHL(x, ret);
l_4 = RETURN(l_1, ret2);
}
--EXPECT--
test:
movl %edi, %eax
movl %esi, %ecx
shll %cl, %eax
movl %eax, %ecx
movl %edi, %eax
shll %cl, %eax
retq