Dmitry Stogov
68068c4f58
Split ir_ctx->flags into public and private (ir_ctx->flags2)
2023-11-17 14:24:33 +03:00
Dmitry Stogov
688f876928
mplemented code-generation for bit counting instructions
2023-11-16 22:48:05 +03:00
Dmitry Stogov
ea2de69592
Add bit counting nodes (JIT code generation is not supported yet)
2023-11-16 03:05:10 +03:00
Dmitry Stogov
90b6f34db2
Add FRAME_ADDR node
2023-11-16 01:59:26 +03:00
Dmitry Stogov
507175b228
Add VA_ARG nodes (JIT code generation is not supported yet)
2023-11-16 00:29:24 +03:00
Dmitry Stogov
a8e514266f
Add support for some LLVM intrinsic
2023-11-15 15:17:36 +03:00
Dmitry Stogov
a2c6f98e75
Improve LLVM loader support (incomplete)
2023-11-10 18:09:48 +03:00
Dmitry Stogov
49316643e7
Initial support for modules (incomplete)
2023-10-20 17:44:45 +03:00
Dmitry Stogov
9b1ce974cb
Improve loader interface (incomplete)
2023-10-20 01:09:46 +03:00
Dmitry Stogov
d0686408e2
Initial support for SYM constants (incomplete)
2023-10-18 11:45:57 +03:00
Dmitry Stogov
211884cf29
Introduce API to load modules
2023-10-11 22:55:25 +03:00
Dmitry Stogov
8668550427
Initial support for LLVM loader (incomplete) ( #53 )
...
Currently we may just load LLVM module and convert all functions into IR (print it).
For better LLVM support IR framework needs support for modules.
Some LLVM features are not supported yet (see TODOs in ir_load_llvm.c) .
2023-10-11 12:46:31 +03:00
Javier Eguiluz
2f4f8504d4
Fix some typos ( #51 )
2023-10-03 08:34:02 +03:00
Dmitry Stogov
51a37f159b
Initial implementation of LLVM export
2023-09-28 20:44:45 +03:00
Dmitry Stogov
8977307f4e
Improve error handling
2023-09-14 20:15:30 +03:00
Dmitry Stogov
0dbb794399
CI tests for MACOS build ( #46 )
2023-08-30 15:24:12 +03:00
Dmitry Stogov
c09877b4ef
Fix compilation warnings
2023-08-30 09:31:14 +03:00
Dmitry Stogov
e60bb978f4
Use _xlat[] slots for "used constants" markers
2023-07-07 13:57:01 +03:00
Dmitry Stogov
5b90420b18
Improved unused constant elimination
2023-07-07 11:15:52 +03:00
Dmitry Stogov
d67c212916
Separate codegen info output into ir_dump_codegen()
2023-06-21 22:36:36 +03:00
Dmitry Stogov
ebaefd376a
Fix stack frame and assign all spill slots before code genearatin
2023-06-21 19:04:22 +03:00
Dmitry Stogov
4124ef5150
Allow printing IR annotated with register-allocation, spill-code-placement, de-SSA and code-generation information
2023-06-21 13:28:15 +03:00
Dmitry Stogov
b37d4e0443
Allow usage of CPU stack slots for deoptimization
2023-06-16 02:14:02 +03:00
Dmitry Stogov
6a98514bdc
Move stack size related metricks to ir_ctx
2023-06-15 19:28:54 +03:00
Dmitry Stogov
311267714e
Use macros insted of bit ops
2023-06-14 20:23:32 +03:00
Dmitry Stogov
4e01e7251e
Implemented support for veneers on AArch64
2023-06-02 00:49:32 +03:00
Dmitry Stogov
46fd86acb9
Itroduce a reference ir_jit_compile() and use it in examples
2023-05-23 10:52:59 +03:00
Tony Su
4cdd3eba77
[Fix]: ir_print_const() prints enclosing quote or not
...
Current ir_print_const() will by default print out the enclosing double
quote for any string, but this will lead to syntax error in dumped dot
file by ir_dump_dot() reported by 'dot' command.
ir_print_const() now has the fourth parameter to indicate whether prints
out the enclosing double quote(") or not.
OLD: ir_print_const(const ir_ctx *ctx, const ir_insn *insn, FILE *f)
NEW: ir_print_const(const ir_ctx *ctx, const ir_insn *insn, FILE *f, bool quoted)
Signed-off-by: Tony Su <tao.su@intel.com>
2023-05-22 21:02:46 +08:00
Dmitry Stogov
5c2023fd7f
Avoid live range constrction for VARs
2023-05-18 21:00:57 +03:00
Tony Su
f005199576
[ir.h]: Put comment in correct place
...
It looks like the comment for IR constant value accidentally is misplaced.
Signed-off-by: Tony Su <tao.su@intel.com>
2023-05-10 19:41:18 +08:00
Dmitry Stogov
c3fca224ff
Introduce IR_OP_FLAG_PINNED and IR_BB_HAS_PHI/PI/PARAM/VAR flags
2023-05-05 16:59:22 +03:00
Dmitry Stogov
1150c80ca2
Fixed support for OSR ENTRY
2023-05-05 12:59:33 +03:00
Dmitry Stogov
23bbdd7ceb
Avoid loop nesting forest consruction if we didn't detect loops in ir_build_dominators_tree()
2023-04-27 18:00:30 +03:00
Dmitry Stogov
367d2e3246
Avoid CFG reachability check after SCCP
...
SCCP eliminates unreachable BBs before the CFG constraction.
So ir_build_cfg() doesn't need to perforem reachability chececk if it
runs after SCCP, otherwise it starts call ir_remove_unreachable_blocks() if necessary.
User code dont have to call ir_remove_unreachable_blocks() anymore.
2023-04-27 14:18:39 +03:00
Dmitry Stogov
e01c43a967
Simplify access to nodes with variable inputs count
2023-04-21 12:40:17 +03:00
Dmitry Stogov
56b0dbccde
Use ir_ctx.mflags for CPU specific code-generation options
...
'mflags' and ir_cpuinfo() return value have the same meaning.
2023-04-18 09:54:35 +03:00
Anatol Belski
f8ca41119c
cpu: Add framework for CPU feature handling
...
This comes with the initial feature to query CPUID on x86. Supported are
both GCC based build and MSVC builds targeting Windows.
Signed-off-by: Anatol Belski <anbelski@linux.microsoft.com>
2023-04-15 01:08:36 +02:00
Dmitry Stogov
e5c01495da
Use arena to allocate live_intervals and nested data structures
2023-04-13 13:47:16 +03:00
Dmitry Stogov
0b78a322f8
Cache deleted live ranges in ir_ctx.unused_ranges
2023-04-13 11:42:47 +03:00
Dmitry Stogov
f85f5fd2a8
Remove data dependency between TAILCALL and UNREACHABLE
2023-04-13 02:41:28 +03:00
Dmitry Stogov
1058cde808
Cleanup instruction selector
2023-03-29 01:21:54 +03:00
Dmitry Stogov
ba0fa44447
Add "const" modifiers
2023-03-28 13:18:12 +03:00
Anatol Belski
d0b4f108ee
ir_init: Accept flags as an additional arguments
...
Signed-off-by: Anatol Belski <ab@php.net>
2023-03-28 00:00:45 +02:00
Anatol Belski
b701684704
ir_init: Expose min limit for constants and instructions
...
Signed-off-by: Anatol Belski <ab@php.net>
2023-03-28 00:00:45 +02:00
Anatol Belski
f55b9b094b
doc: Add short comments to some flags
...
Signed-off-by: Anatol Belski <ab@php.net>
2023-03-28 00:00:44 +02:00
Anatol Belski
091a24d53f
C++: Add guards for relevant headers
...
Signed-off-by: Anatol Belski <ab@php.net>
2023-03-27 00:49:38 +02:00
Dmitry Stogov
24e8e216a1
Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.
2023-03-23 00:47:27 +03:00
Dmitry Stogov
87dbdcea0d
Add necessary compensation loads for bounded nodes when enter into function through OSR entry-point
2023-03-21 13:45:37 +03:00
Dmitry Stogov
f5b7065b10
Refactor the ENTRY nodes
...
Now all ENTRY nodes have a "fake" input control edge.
Through this edge all of them are dominated by START node.
2023-03-17 09:02:37 +03:00
Dmitry Stogov
09409898ea
Reorder instructions to use simpler and more efficient checks
2023-03-15 23:49:50 +03:00