Dmitry Stogov
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3af9e1a062
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Move some common code into ir_emit.c
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2022-10-26 22:52:19 +03:00 |
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Dmitry Stogov
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1b84570aa3
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Intoduce ir_emit.c that shuould keep common part for different targets
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2022-10-26 22:06:07 +03:00 |
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Dmitry Stogov
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62c981a091
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remove hardcoded dependencies
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2022-10-26 21:26:24 +03:00 |
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Dmitry Stogov
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74debb0bf4
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Add "ir_load.c" to allow build without llk.php and initial multi-platform support
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2022-10-26 19:52:14 +03:00 |
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Dmitry Stogov
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95e6cafe7c
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cleanup
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2022-10-26 16:06:16 +03:00 |
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Dmitry Stogov
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9b7835a05e
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Use ir_emit_exitgroup() helper API instead of IR_EXITGROUP node
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2022-10-26 15:46:59 +03:00 |
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Dmitry Stogov
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2dea40bfab
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Add API to patch native code
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2022-10-26 13:44:44 +03:00 |
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Dmitry Stogov
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edd7bc7101
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Access ctx->rules[] trough inline function with assertion
Fix incorrect accesses
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2022-10-26 12:49:34 +03:00 |
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Dmitry Stogov
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b99d98979f
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Limit CMP+GUARD fusing
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2022-10-25 22:09:32 +03:00 |
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Dmitry Stogov
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006bee10c7
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Add checks for constant references before checking the corresponding rule
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2022-10-25 20:36:22 +03:00 |
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Dmitry Stogov
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4b114914dc
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Prevent register clobbering
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2022-10-25 12:24:05 +03:00 |
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Dmitry Stogov
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ba90e2825e
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SNAPSHOT data shouldn't be in registers
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2022-10-25 12:22:49 +03:00 |
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Dmitry Stogov
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265ebc1000
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Fix two LSRA edge cases
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2022-10-24 21:55:59 +03:00 |
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Dmitry Stogov
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9f472c1c91
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Add support for deoptimization and binding to multiple slots
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2022-10-21 17:16:25 +03:00 |
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Dmitry Stogov
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6667b7efae
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Fix register allocation (one of operands MUST be in a register)
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2022-10-21 12:02:31 +03:00 |
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Dmitry Stogov
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22cd9265d3
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Check if the register is necessary at all
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2022-10-18 22:02:09 +03:00 |
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Dmitry Stogov
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1dcfe127e1
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Allow save/load "null" references
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2022-10-18 15:52:25 +03:00 |
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Dmitry Stogov
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3d175e1576
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Fix fuse load
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2022-10-18 13:53:00 +03:00 |
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Dmitry Stogov
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ecb9719e8b
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Fix "long" PHI handling
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2022-10-12 14:01:56 +03:00 |
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Dmitry Stogov
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81c90972d6
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Avoid useless spill stores
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2022-10-12 12:09:52 +03:00 |
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Dmitry Stogov
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678da7fcc1
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Use proper MOV instructions
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2022-10-12 12:01:49 +03:00 |
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Dmitry Stogov
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6e0415a44d
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Fix SCCP for PHIs
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2022-10-12 12:01:28 +03:00 |
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Dmitry Stogov
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c74cac2556
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Fix support for "long" PHIs
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2022-10-12 11:59:49 +03:00 |
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Dmitry Stogov
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3ef58e5c2e
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Take into account RLOADs for non fixed registers
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2022-10-11 22:23:09 +03:00 |
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Dmitry Stogov
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f5c0151740
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Remove hints to the same virtual register
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2022-10-05 20:31:20 +03:00 |
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Dmitry Stogov
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e9402c8436
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Add hint for "op1" if result reuses "op1" register.
This improves register allocation if regiter for result was coalesced and allocated before the register for operand.
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2022-10-05 17:58:37 +03:00 |
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Dmitry Stogov
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d2a0347b21
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Merge basic blocks by removing connected END to BEGIN nodes
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2022-10-05 16:29:49 +03:00 |
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Dmitry Stogov
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db8a80e8d5
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Temporary remove "pxor".
It should be added before all "cvt*" instructions
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2022-09-29 20:05:00 +03:00 |
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Dmitry Stogov
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a98124a552
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External __jit_debug_register_code() is necessary only on ARM
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2022-09-29 17:10:32 +03:00 |
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Dmitry Stogov
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0da4b43de8
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Fix second argument address
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2022-09-29 14:17:54 +03:00 |
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Dmitry Stogov
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33bc4ce956
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Fixed comparison with zero
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2022-09-29 11:31:07 +03:00 |
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Dmitry Stogov
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a6e4e988d0
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Fix ARM code generator
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2022-09-29 02:10:44 +03:00 |
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Dmitry Stogov
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c3e6a71dda
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Allow using external __jit_debug_register_code().
Fuinction defined in DSO may work improperly.
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2022-09-29 01:28:30 +03:00 |
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Dmitry Stogov
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494c9225a9
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Refactor trace related helpers
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2022-09-29 01:25:42 +03:00 |
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Dmitry Stogov
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81f1108049
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Add task
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2022-09-28 21:58:38 +03:00 |
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Dmitry Stogov
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fdaa0cea54
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Ignore dead TLS loads
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2022-09-28 21:56:10 +03:00 |
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Dmitry Stogov
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a1361d77ba
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Support for calling FASTCALL variable functions.
Currutly this done through BITCAST hack.
It may make sense to implement full support for function prototypes.
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2022-09-28 20:48:35 +03:00 |
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Dmitry Stogov
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36b59306ee
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Add task
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2022-09-28 14:59:16 +03:00 |
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Dmitry Stogov
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66b62b7447
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Fix use after reallocation
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2022-09-28 14:31:46 +03:00 |
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Dmitry Stogov
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924f5949f2
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Fixed SSE operands alignment and 32-bit support
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2022-09-27 20:36:34 +03:00 |
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Dmitry Stogov
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408b8d2e4b
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Fixed support for GUARD/GUARD_NOT
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2022-09-27 16:52:15 +03:00 |
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Dmitry Stogov
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31220b1de9
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Add code generators for missing GUARDs
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2022-09-26 20:47:29 +03:00 |
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Dmitry Stogov
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da11454058
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Fix incorrect code for IJMP
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2022-09-26 14:45:12 +03:00 |
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Dmitry Stogov
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2b4a7d2cb3
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Fix out of bounds array access
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2022-09-23 12:36:11 +03:00 |
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Dmitry Stogov
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8f5768628a
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Initial support for tracing JIT
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2022-09-23 12:22:59 +03:00 |
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Dmitry Stogov
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05fd1f971d
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Better LOAD fusion
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2022-09-21 23:54:45 +03:00 |
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Dmitry Stogov
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12c183f391
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Added support for GUARD_OVERFLOW
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2022-09-20 17:38:27 +03:00 |
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Dmitry Stogov
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c186fb2c25
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Fix constant address loading
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2022-09-20 14:37:10 +03:00 |
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Dmitry Stogov
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45fff1fe5f
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Implement binding IR node to VAR (assign spill slot)
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2022-09-20 11:03:25 +03:00 |
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Dmitry Stogov
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ba748d5bd4
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Simplify loop exit condition
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2022-09-20 10:42:38 +03:00 |
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