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47 Commits

Author SHA1 Message Date
Dmitry Stogov
49316643e7 Initial support for modules (incomplete) 2023-10-20 17:44:45 +03:00
Dmitry Stogov
9b1ce974cb Improve loader interface (incomplete) 2023-10-20 01:09:46 +03:00
Dmitry Stogov
d0686408e2 Initial support for SYM constants (incomplete) 2023-10-18 11:45:57 +03:00
Dmitry Stogov
4fce67fcb7 Restore accedently removed ir_free() 2023-10-11 23:01:15 +03:00
Dmitry Stogov
211884cf29 Introduce API to load modules 2023-10-11 22:55:25 +03:00
Dmitry Stogov
8668550427
Initial support for LLVM loader (incomplete) (#53) 
Currently we may just load LLVM module and convert all functions into IR (print it).
For better LLVM support IR framework needs support for modules.
Some LLVM features are not supported yet (see TODOs in ir_load_llvm.c) .
 2023-10-11 12:46:31 +03:00
Javier Eguiluz
2f4f8504d4
Fix some typos (#51) 2023-10-03 08:34:02 +03:00
Dmitry Stogov
51a37f159b Initial implementation of LLVM export 2023-09-28 20:44:45 +03:00
Dmitry Stogov
8977307f4e Improve error handling 2023-09-14 20:15:30 +03:00
Dmitry Stogov
0dbb794399
CI tests for MACOS build (#46) 2023-08-30 15:24:12 +03:00
Dmitry Stogov
d67c212916 Separate codegen info output into ir_dump_codegen() 2023-06-21 22:36:36 +03:00
Dmitry Stogov
4124ef5150 Allow printing IR annotated with register-allocation, spill-code-placement, de-SSA and code-generation information 2023-06-21 13:28:15 +03:00
Tony Su
42882d18f1 [ir_main]: print default optimization level in help message 
At first, I had thought optimization is disabled without -O option, in
fact, the default level is 2 and let's make it clear in --help message.

Signed-off-by: Tony Su <tao.su@intel.com>
 2023-05-10 19:41:18 +08:00
Tony Su
007856ffd6 [Bug]: Fix target CPU AVX availability check logic 
Use && instead of & to make the checking logic clear.
Keep flag in error message compatible with --help message.

Signed-off-by: Tony Su <tao.su@intel.com>
 2023-05-10 19:41:18 +08:00
Dmitry Stogov
367d2e3246 Avoid CFG reachability check after SCCP 
SCCP eliminates unreachable BBs before the CFG constraction.
So ir_build_cfg() doesn't need to perforem reachability chececk if it
runs after SCCP, otherwise it starts call ir_remove_unreachable_blocks() if necessary.
User code dont have to call ir_remove_unreachable_blocks() anymore.
 2023-04-27 14:18:39 +03:00
Dmitry Stogov
56b0dbccde Use ir_ctx.mflags for CPU specific code-generation options 
'mflags' and ir_cpuinfo() return value have the same meaning.
 2023-04-18 09:54:35 +03:00
Anatol Belski
d0b4f108ee ir_init: Accept flags as an additional arguments 
Signed-off-by: Anatol Belski <ab@php.net>
 2023-03-28 00:00:45 +02:00
Dmitry Stogov
f5e84ec44c Simplify compilation pipeline 2023-03-22 23:58:08 +03:00
Dmitry Stogov
e88b6ab92d Hide Windows fault message box on Windows during make test 2023-03-07 10:54:46 +03:00
Dmitry Stogov
300665700f Adopt IR test engine for Windows (this requires php and diff installed) 2023-03-01 20:31:14 +03:00
Anatol Belski
964f5a0191 build: MSVC compatibility 
Signed-off-by: Anatol Belski <ab@php.net>
 2023-02-25 00:04:57 +01:00
Dmitry Stogov
8b4678a9ae Add "--dump-size" option 2023-02-21 22:22:41 +03:00
Dmitry Stogov
58ba18bb7d Fix ir_test and set proper initial SP offset info for GDB backtraces 2023-01-31 11:51:55 +03:00
Dmitry Stogov
6a4e239773 Create a sparate pass to remove unreachableble CFG blocks. 
SCCP pass removes unreachable blocks before CFG construction.
In case of -O0 or -O1 pipeline (without SCCP) it's simpler and faster
to unlink unreachable CFG blocks once, then check for reachability
in almost any compilation pass.
-O2 pipeline (with SCCP) don't need this pass.
 2022-11-29 20:02:07 +03:00
Dmitry Stogov
cc56f12f13 Add LICENSE and copyright notices 2022-11-08 11:32:46 +03:00
Dmitry Stogov
d2a0347b21 Merge basic blocks by removing connected END to BEGIN nodes 2022-10-05 16:29:49 +03:00
Dmitry Stogov
70f6faa612 Add basic IR verification 2022-08-24 13:57:55 +03:00
Dmitry Stogov
d7ddbf89fb Fix usage help 2022-08-10 09:31:19 +03:00
Dmitry Stogov
2148f05392 Initial support for fascall calling convention (incomplete) 2022-06-22 23:59:56 +03:00
Dmitry Stogov
082bcf89c9 Use ir_ctx.fixed_regset to limit available registers 2022-06-21 16:13:14 +03:00
Dmitry Stogov
411dd20331 Support for code fragments with multiple entries 2022-06-16 23:49:27 +03:00
Dmitry Stogov
af4558e439 Allow emitting native code into preallocated buffer 2022-06-10 11:30:19 +03:00
Dmitry Stogov
5cafe50d36 Initial support for PHP 2022-06-10 00:16:29 +03:00
Dmitry Stogov
91bddc09ed Cleanup & unification 2022-06-01 00:34:45 +03:00
Dmitry Stogov
41f3e43cf7 cleanup 2022-05-27 13:18:04 +03:00
Dmitry Stogov
7e782a291a Extend disassembler to support .rodata section and IP relative data labels 2022-05-26 01:17:02 +03:00
Dmitry Stogov
19e93fd3f6 Allow multi-target test suite 2022-05-25 17:38:22 +03:00
Dmitry Stogov
463002107a Rename "gcm_blocks" into "cfg_map" 2022-05-25 09:33:47 +03:00
Dmitry Stogov
58b67fec18 Topological sort of nodes in each basic block 2022-05-24 18:04:38 +03:00
Dmitry Stogov
d3c1e4a02f Reorder basic blocks to reduce number of jumps and improve code locality 2022-05-24 00:43:35 +03:00
Dmitry Stogov
e794451451 Preallocate call stack 2022-05-17 22:37:13 +03:00
Dmitry Stogov
4eaca331b9 Allow using debug_regset in RELEASE build 2022-05-13 09:22:31 +03:00
Dmitry Stogov
2b9e793b4e Add debug options 2022-04-27 14:47:52 +03:00
Dmitry Stogov
6b60d8fba9 Code generation for VLOAD and VSTORE 2022-04-19 22:35:29 +03:00
Dmitry Stogov
155c9572c8 Add ability to run "ir_test" with different optimization levels 
Fix JIT for "cmp mem, imm"
 2022-04-19 11:03:01 +03:00
Dmitry Stogov
02863d7dc9 Initial JIT support for IR_CALL 2022-04-07 18:08:06 +03:00
Dmitry Stogov
2937993190 Initial import 2022-04-06 00:19:23 +03:00