9 Commits

Author	SHA1	Message	Date
Dmitry Stogov	2b9e793b4e	Add debug options	2022-04-27 14:47:52 +03:00
Dmitry Stogov	c36efda8a5	Improve register allocation for commutative instructions ... - swap operands f this make sense - fix coalescing bug	2022-04-21 16:38:18 +03:00
Dmitry Stogov	016a7c14d7	Fixed format	2022-04-19 22:41:51 +03:00
Dmitry Stogov	6b60d8fba9	Code generation for VLOAD and VSTORE	2022-04-19 22:35:29 +03:00
Dmitry Stogov	0922b7cd7f	Add vreg hints	2022-04-15 16:02:23 +03:00
Dmitry Stogov	3f6a6aa3ea	Better CPU constraint model and initial support for live interval splitting (incomplete)	2022-04-14 22:40:13 +03:00
Dmitry Stogov	9ccefcf973	Support for more instruction in C backend and BOOL_NOT in x86_86	2022-04-08 19:02:11 +03:00
Dmitry Stogov	5b34386f62	Register Allocator suppor for fixed registers, use positions and register hints (incomplete).	2022-04-07 11:11:57 +03:00
Dmitry Stogov	2937993190	Initial import	2022-04-06 00:19:23 +03:00