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85 Commits

Author SHA1 Message Date
Dmitry Stogov
25bd3024da Codegeneration for VA_ARG nodes (Windows and MacOS are not supported yet) 2023-11-23 19:38:33 +03:00
Dmitry Stogov
68068c4f58 Split ir_ctx->flags into public and private (ir_ctx->flags2) 2023-11-17 14:24:33 +03:00
Dmitry Stogov
8668550427
Initial support for LLVM loader (incomplete) (#53) 
Currently we may just load LLVM module and convert all functions into IR (print it).
For better LLVM support IR framework needs support for modules.
Some LLVM features are not supported yet (see TODOs in ir_load_llvm.c) .
 2023-10-11 12:46:31 +03:00
Dmitry Stogov
9ea551a34f LLVM support for fastcall and vararg 2023-09-29 11:30:53 +03:00
Dmitry Stogov
dd2ecad299 Allow reuse of spill slots for objecs of smaller size 2023-08-02 13:20:13 +03:00
Dmitry Stogov
1d49fe6cc4 Reduce cost of disabled IR_ASSERT() 2023-07-27 11:16:00 +03:00
Dmitry Stogov
f6cf9140da Update ir_insn.inputs_count and use it after ir_build_def_use_lists() 2023-07-06 01:15:08 +03:00
Dmitry Stogov
ce2d6ceba6 Fixed non-boolean constant GUARD condition checks 2023-06-29 23:49:20 +03:00
Dmitry Stogov
d67c212916 Separate codegen info output into ir_dump_codegen() 2023-06-21 22:36:36 +03:00
Dmitry Stogov
ebaefd376a Fix stack frame and assign all spill slots before code genearatin 2023-06-21 19:04:22 +03:00
Dmitry Stogov
4124ef5150 Allow printing IR annotated with register-allocation, spill-code-placement, de-SSA and code-generation information 2023-06-21 13:28:15 +03:00
Dmitry Stogov
6a98514bdc Move stack size related metricks to ir_ctx 2023-06-15 19:28:54 +03:00
Dmitry Stogov
311267714e Use macros insted of bit ops 2023-06-14 20:23:32 +03:00
Dmitry Stogov
c93abd79b2 Remove IR_OPND_VAR 2023-05-19 13:00:55 +03:00
Dmitry Stogov
5c2023fd7f Avoid live range constrction for VARs 2023-05-18 21:00:57 +03:00
Dmitry Stogov
ef31712f26 Remove usused IR_LIVE_INTERVAL_REG_LOAD flag 2023-05-18 14:17:54 +03:00
Dmitry Stogov
b6517f2028 Split IR_LIVE_INTERVAL_HAS_HINTS into IR_LIVE_INTERVAL_HAS_HINT_REGS and 
IR_LIVE_INTERVAL_HAS_HINT_REFS
 2023-05-18 10:48:31 +03:00
Dmitry Stogov
c3fca224ff Introduce IR_OP_FLAG_PINNED and IR_BB_HAS_PHI/PI/PARAM/VAR flags 2023-05-05 16:59:22 +03:00
Dmitry Stogov
76f44fa126 Implemented path-exploration based live ranges construction 
The algorithm is based on "Computing Liveness Sets for SSA-Form Programs",
Florian Brandner, Benoit Boissinot, Alain Darte, Benoit Dupont de Dinechin,
Fabrice Rastello. TR Inria RR-7503, 2011

In comparison to the existing bitset based approach, the new algorithm
is more memory-space efficient and faster on big functions.
 2023-05-05 02:01:53 +03:00
Dmitry Stogov
1bbee7b9da Get rid of ir_live_interval.top 2023-04-28 09:49:12 +03:00
Dmitry Stogov
1749168078 Add ir_insn_len() and ir_insn_inputs_to_len() private helpers 2023-04-21 13:40:55 +03:00
Dmitry Stogov
e01c43a967 Simplify access to nodes with variable inputs count 2023-04-21 12:40:17 +03:00
Dmitry Stogov
44f048ecd9 Reorder fields to reduce the structure size 2023-04-13 21:37:39 +03:00
Dmitry Stogov
2a17b87219 LSRA optimization 2023-04-13 20:56:49 +03:00
Dmitry Stogov
e5c01495da Use arena to allocate live_intervals and nested data structures 2023-04-13 13:47:16 +03:00
Dmitry Stogov
0b78a322f8 Cache deleted live ranges in ir_ctx.unused_ranges 2023-04-13 11:42:47 +03:00
Dmitry Stogov
d71cbd47d5 Disable LICM across an OSR ENTRY if the value can't be restored at OSR ENTRY point 2023-04-07 16:36:27 +03:00
Dmitry Stogov
efa8a83153 Fix spilling code for arguments passed theought stack and change RA to 
prefer reusing the same register for splitted intervals
i#	utils/
 2023-04-06 00:16:49 +03:00
Dmitry Stogov
1e5e9e08ce Re-implement instruction fusion and live-range construction 2023-04-05 19:20:43 +03:00
Dmitry Stogov
ba0fa44447 Add "const" modifiers 2023-03-28 13:18:12 +03:00
Dmitry Stogov
87dbdcea0d Add necessary compensation loads for bounded nodes when enter into function through OSR entry-point 2023-03-21 13:45:37 +03:00
Dmitry Stogov
f5b7065b10 Refactor the ENTRY nodes 
Now all ENTRY nodes have a "fake" input control edge.
Through this edge all of them are dominated by START node.
 2023-03-17 09:02:37 +03:00
Dmitry Stogov
9b34731d16 Fix most MSVC compilation warnings 2023-02-28 02:11:09 +03:00
Anatol Belski
964f5a0191 build: MSVC compatibility 
Signed-off-by: Anatol Belski <ab@php.net>
 2023-02-25 00:04:57 +01:00
Dmitry Stogov
fd653528e9 JMP optimization. Lift constant IJMP targets into jmp_table(s). 2023-02-16 22:41:55 +03:00
Dmitry Stogov
9b6b6996c4 Move IR_ALWAYS_INLINE and IR_NEVER_INLINE definition into public ir.h 2023-02-07 23:14:10 +03:00
Dmitry Stogov
677c6cb2cb Move declaration of some register alloation related macros to public API 
Use RLOAD.op3 as a flag to avoid spill store
 2023-01-30 16:33:57 +03:00
Dmitry Stogov
32ad3d1052 Use inline functions to avoid false positive address sanitaizer warnings 2023-01-20 15:35:02 +03:00
Dmitry Stogov
6a4e239773 Create a sparate pass to remove unreachableble CFG blocks. 
SCCP pass removes unreachable blocks before CFG construction.
In case of -O0 or -O1 pipeline (without SCCP) it's simpler and faster
to unlink unreachable CFG blocks once, then check for reachability
in almost any compilation pass.
-O2 pipeline (with SCCP) don't need this pass.
 2022-11-29 20:02:07 +03:00
Dmitry Stogov
7fd1ccf48b Eliminte useless checks 2022-11-24 12:23:05 +03:00
Dmitry Stogov
7d07a4ac89 Strength reduction 2022-11-18 14:38:19 +03:00
Dmitry Stogov
00395f0a23 Cleanup: separate ir_phi_input_number() function 2022-11-18 10:11:16 +03:00
Dmitry Stogov
3e3746d5cb Refactor API that expose target CPU register constraints for register allocator 2022-11-17 23:30:35 +03:00
Jim Huang
af75775bac Fix build on macOS 
Corresponding compilation errors:

ir_private.h:11:10: fatal error: 'malloc.h' file not found

ir_gdb.c:162:17: error: implicit declaration of function 'offsetof' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
        .shofs       = offsetof(ir_gdbjit_obj, sect),
 2022-11-12 01:24:33 +08:00
Jim Huang
c4017eab4b Fix build with GCC prior to 10 2022-11-11 18:05:05 +08:00
Dmitry Stogov
b56f1f5298 Refactor CFG construction algorithm to mark all BB starts in two passes. 
First we perform a backwad DFS search from "stop" nodes. This pass may
leak some CFG paths ended by infinite loops. To support these paths we
record their possible roots and perform forward DFS search starting from
them.
 2022-11-11 10:25:59 +03:00
Dmitry Stogov
47ddea00ac Use better conditions 2022-11-11 02:56:16 +03:00
Dmitry Stogov
a4b09dd3ce Improve CFG builder 2022-11-11 00:19:17 +03:00
Dmitry Stogov
78cc14aca9 Fix ir_worklist_clear() 2022-11-10 22:44:29 +03:00
Dmitry Stogov
f484b5d16b micro-optimization 2022-11-09 13:23:30 +03:00