Dmitry Stogov
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8871550542
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Show EBTRY nodes and "fake" control edges differently
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2023-03-17 09:20:00 +03:00 |
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Dmitry Stogov
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3535fd2fc4
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Fix compilation warnings and signed/unsigned mess
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2022-11-08 23:09:35 +03:00 |
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Dmitry Stogov
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cc56f12f13
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Add LICENSE and copyright notices
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2022-11-08 11:32:46 +03:00 |
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Dmitry Stogov
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e6f6e92d66
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Improve spill code fusion
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2022-09-15 17:52:28 +03:00 |
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Dmitry Stogov
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ca109d3fc9
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Use single live interval to handle all scratch registers clobbered by CALL
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2022-08-11 19:56:59 +03:00 |
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Dmitry Stogov
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a165c43196
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Initial support for thread local storage + optimization of some related code selection patterns
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2022-06-22 16:02:43 +03:00 |
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Dmitry Stogov
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5ef1e97261
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Better support for unreachable basic blocks
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2022-06-20 16:34:44 +03:00 |
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Dmitry Stogov
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3f6c1ee0f5
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cleanup
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2022-06-15 22:48:19 +03:00 |
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Dmitry Stogov
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ba6bb796a4
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Fix "dot" graphs
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2022-06-15 17:31:59 +03:00 |
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Dmitry Stogov
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41f3e43cf7
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cleanup
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2022-05-27 13:18:04 +03:00 |
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Dmitry Stogov
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463002107a
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Rename "gcm_blocks" into "cfg_map"
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2022-05-25 09:33:47 +03:00 |
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Dmitry Stogov
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911219493d
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Implement IJMP instruction (indirect jump or computed goto)
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2022-05-19 18:56:48 +03:00 |
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Dmitry Stogov
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6fb5380906
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Take into account spill slot size and alignment
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2022-05-16 22:16:29 +03:00 |
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Dmitry Stogov
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e8dd422167
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Cleanup "top" usage
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2022-05-16 10:19:30 +03:00 |
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Dmitry Stogov
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3dac541928
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LSRA cleanup
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2022-05-13 12:14:21 +03:00 |
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Dmitry Stogov
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1f673ebfda
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Better temporary register usage for SSA deconstruction
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2022-05-13 00:32:37 +03:00 |
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Dmitry Stogov
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f8edcb9762
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Fix possible crash
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2022-05-11 18:18:28 +03:00 |
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Dmitry Stogov
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6d7ea2fd37
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Prevent crash when dump dessa moves with -O0
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2022-05-11 17:05:29 +03:00 |
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Dmitry Stogov
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69b5a852e5
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Make DESSA API use "ir_ref" instead of "virtual register number"
(0 - is still a temporary register)
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2022-05-06 16:19:57 +03:00 |
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Dmitry Stogov
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dd5a3a3b72
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Add flexible support for temporary registers.
Get rid of hardcoded temporary registers (incomplete)
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2022-05-05 22:35:39 +03:00 |
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Dmitry Stogov
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2b9e793b4e
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Add debug options
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2022-04-27 14:47:52 +03:00 |
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Dmitry Stogov
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c36efda8a5
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Improve register allocation for commutative instructions
- swap operands f this make sense
- fix coalescing bug
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2022-04-21 16:38:18 +03:00 |
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Dmitry Stogov
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016a7c14d7
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Fixed format
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2022-04-19 22:41:51 +03:00 |
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Dmitry Stogov
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6b60d8fba9
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Code generation for VLOAD and VSTORE
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2022-04-19 22:35:29 +03:00 |
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Dmitry Stogov
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0922b7cd7f
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Add vreg hints
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2022-04-15 16:02:23 +03:00 |
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Dmitry Stogov
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3f6a6aa3ea
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Better CPU constraint model and initial support for live interval splitting (incomplete)
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2022-04-14 22:40:13 +03:00 |
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Dmitry Stogov
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9ccefcf973
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Support for more instruction in C backend and BOOL_NOT in x86_86
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2022-04-08 19:02:11 +03:00 |
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Dmitry Stogov
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5b34386f62
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Register Allocator suppor for fixed registers, use positions and register hints (incomplete).
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2022-04-07 11:11:57 +03:00 |
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Dmitry Stogov
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2937993190
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Initial import
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2022-04-06 00:19:23 +03:00 |
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