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Author SHA1 Message Date
Dmitry Stogov
1150c80ca2 Fixed support for OSR ENTRY 2023-05-05 12:59:33 +03:00
Dmitry Stogov
76f44fa126 Implemented path-exploration based live ranges construction 
The algorithm is based on "Computing Liveness Sets for SSA-Form Programs",
Florian Brandner, Benoit Boissinot, Alain Darte, Benoit Dupont de Dinechin,
Fabrice Rastello. TR Inria RR-7503, 2011

In comparison to the existing bitset based approach, the new algorithm
is more memory-space efficient and faster on big functions.
 2023-05-05 02:01:53 +03:00
Dmitry Stogov
ac3a11e911 Improve ir_add_live_range(). Set ival->type when process definition. 2023-05-04 12:23:40 +03:00
Dmitry Stogov
47b0bb0789 Remove useless memset() 2023-05-04 01:31:34 +03:00
Dmitry Stogov
d30f523c62 Avoid iteration over an empty bitset 2023-05-03 12:30:05 +03:00
Dmitry Stogov
1bbee7b9da Get rid of ir_live_interval.top 2023-04-28 09:49:12 +03:00
Dmitry Stogov
23bbdd7ceb Avoid loop nesting forest consruction if we didn't detect loops in ir_build_dominators_tree() 2023-04-27 18:00:30 +03:00
Dmitry Stogov
367d2e3246 Avoid CFG reachability check after SCCP 
SCCP eliminates unreachable BBs before the CFG constraction.
So ir_build_cfg() doesn't need to perforem reachability chececk if it
runs after SCCP, otherwise it starts call ir_remove_unreachable_blocks() if necessary.
User code dont have to call ir_remove_unreachable_blocks() anymore.
 2023-04-27 14:18:39 +03:00
Dmitry Stogov
b15d9d213f Use a faster dominator tree construction algorithm that relays on required IR BB order 2023-04-27 11:49:21 +03:00
Dmitry Stogov
53f4435f8e Fixed test 2023-04-26 14:24:43 +03:00
Dmitry Stogov
60802d942f Fix previous commit. We still need a temporary register for indirect calls. 2023-04-26 14:10:58 +03:00
Dmitry Stogov
9eb366698d Avoid reservaton of temporary resiser for argument passing 
We may use any scratch register that is not used for parameters
 2023-04-26 12:16:05 +03:00
Dmitry Stogov
0de0c1d0fa Improve parallel copy algorithm to support move of single source into multiple destinations 2023-04-26 10:56:55 +03:00
Dmitry Stogov
c2470bc684 Disable LICM across an OSR ENTRY if the value can't be restored at OSR ENTRY point (support for nested loops) 2023-04-25 21:54:30 +03:00
Dmitry Stogov
7441eb2171 Limit Alias Analyses (search above address doesn't make sense) 2023-04-25 14:35:20 +03:00
Dmitry Stogov
342be9c5c6 Prevent "dead" STORE elimination in case there is a GUARD beteen two STOREs 2023-04-25 13:58:27 +03:00
Dmitry Stogov
20d3a4fac1
Merge pull request #26 from stkeke/show_diff_win 
[ir-test]: Fix #25: use 'fc.exe' for diff on Windows
 2023-04-25 09:22:57 +03:00
Tony Su
66c07b8cc7 [ir-test]: Fix #25: use 'fc.exe' for diff on Windows 
Fix: https://github.com/dstogov/ir/issues/25

> nmake.exe -f .\win32\Makefile test-ci

001.irt is specially changed for test to fail.
FAIL: 001: add function [.\tests\001.irt]
Comparing files .\TESTS\001.exp and .\TESTS\001.OUT
***** .\TESTS\001.exp
    1:  {
    2:          uintptr_t c_1 = 1;
    3:          bool c_2 = 0;
***** .\TESTS\001.OUT
    1:  {
    2:          uintptr_t c_1 = 0;
    3:          bool c_2 = 0;
*****

Signed-off-by: Tony Su <tao.su@intel.com>
 2023-04-23 10:38:39 +08:00
Dmitry Stogov
1749168078 Add ir_insn_len() and ir_insn_inputs_to_len() private helpers 2023-04-21 13:40:55 +03:00
Dmitry Stogov
e01c43a967 Simplify access to nodes with variable inputs count 2023-04-21 12:40:17 +03:00
Dmitry Stogov
683f8d2124
Merge pull request #24 from stkeke/enhence_ir-test 
Enhance ir test framework
 2023-04-19 15:02:11 +03:00
Tony Su
4b9391c8b1 [ir-test]: Enhance ir-test for Linux and Windows 
This is a series of enhancements for ir-test and related Makefile
for Linux and Windows.

UpdateLog:
1) Make ir-test run from any directory
2) add --help option and print program usage
3) Enable user to specify test folders and/or files to run
4) Check unsupported option and print help usage
5) Update Makefile to use new ir-test options
6) some code refactory

Signed-off-by: Tony Su <tao.su@intel.com>
Reviewed-by  : Dmitry Stogov
Reviewed-by  : Anatol Belski
 2023-04-19 19:33:36 +08:00
Dmitry Stogov
1f7a2bd243 Remove useless "AVX" tests for AArch64 2023-04-18 10:14:59 +03:00
Dmitry Stogov
bcf6c2f152 Set 'mflags' default value 2023-04-18 09:59:41 +03:00
Dmitry Stogov
56b0dbccde Use ir_ctx.mflags for CPU specific code-generation options 
'mflags' and ir_cpuinfo() return value have the same meaning.
 2023-04-18 09:54:35 +03:00
Dmitry Stogov
d26099c5ac
Merge pull request #21 from weltling/cpuid 
[RFC] cpu: Add framework for CPU feature handling
 2023-04-17 10:35:29 +03:00
Anatol Belski
f8ca41119c cpu: Add framework for CPU feature handling 
This comes with the initial feature to query CPUID on x86. Supported are
both GCC based build and MSVC builds targeting Windows.

Signed-off-by: Anatol Belski <anbelski@linux.microsoft.com>
 2023-04-15 01:08:36 +02:00
Dmitry Stogov
204251a83c Update tasks 2023-04-14 10:45:56 +03:00
Dmitry Stogov
ac7f9a3a02 Improve ir_compute_live_ranges() 2023-04-14 01:47:47 +03:00
Dmitry Stogov
1115e7fb6e cleanup 2023-04-13 21:45:38 +03:00
Dmitry Stogov
44f048ecd9 Reorder fields to reduce the structure size 2023-04-13 21:37:39 +03:00
Dmitry Stogov
2a17b87219 LSRA optimization 2023-04-13 20:56:49 +03:00
Dmitry Stogov
e5c01495da Use arena to allocate live_intervals and nested data structures 2023-04-13 13:47:16 +03:00
Dmitry Stogov
0b78a322f8 Cache deleted live ranges in ir_ctx.unused_ranges 2023-04-13 11:42:47 +03:00
Dmitry Stogov
1f447a538b Better iterative DCE after SCCP 2023-04-13 10:39:00 +03:00
Dmitry Stogov
7d395532d9 Simplify ir_assign_virtual_registers() 2023-04-13 03:01:08 +03:00
Dmitry Stogov
f85f5fd2a8 Remove data dependency between TAILCALL and UNREACHABLE 2023-04-13 02:41:28 +03:00
Dmitry Stogov
96761ed6cb Fix compilation warnings 2023-04-12 22:45:53 +03:00
Dmitry Stogov
04795b9f04 Fix compilation warnings 2023-04-12 10:48:30 +03:00
Dmitry Stogov
d71cbd47d5 Disable LICM across an OSR ENTRY if the value can't be restored at OSR ENTRY point 2023-04-07 16:36:27 +03:00
Dmitry Stogov
efa8a83153 Fix spilling code for arguments passed theought stack and change RA to 
prefer reusing the same register for splitted intervals
i#	utils/
 2023-04-06 00:16:49 +03:00
Dmitry Stogov
1e5e9e08ce Re-implement instruction fusion and live-range construction 2023-04-05 19:20:43 +03:00
Dmitry Stogov
b109e2f2cd Disable LOAD fusion if there is a STORE or CALL between LOAD and its use 2023-03-30 19:07:21 +03:00
Dmitry Stogov
ee827ee983 Don't create two DEF UsePos 2023-03-29 17:22:49 +03:00
Dmitry Stogov
d79bd88f6f Improve x86 code generation for passing address of label to stack 
-       leal .L1, %eax
-       movl %eax, (%esp)
+       movl $.L1, (%esp)
 2023-03-29 15:48:41 +03:00
Dmitry Stogov
5bed3d73a5 Fix test 2023-03-29 15:13:17 +03:00
Dmitry Stogov
7164bc30e4 Fix "diff" on Windows 2023-03-29 15:08:05 +03:00
Dmitry Stogov
b63041199e Add --show-diff for Windows CI test 2023-03-29 14:53:50 +03:00
Dmitry Stogov
b193a348c5 Add --show-diff for Windows CI test 2023-03-29 14:43:54 +03:00
Dmitry Stogov
26e462fa42 Add more folding rules 2023-03-29 14:07:31 +03:00