Dmitry Stogov
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fe333adfa1
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Add ability to force fix/restore some predefied registers
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2022-06-23 22:39:00 +03:00 |
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Dmitry Stogov
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c9fa87e6c4
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Support for fastcall caling convention.
(this should be reimplemented through function prototypes)
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2022-06-23 13:14:30 +03:00 |
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Dmitry Stogov
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ef3ffff81b
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Fix CALL/1 copying. Fallback to CALL+RETURN when we can't generate code for TAILCALL.
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2022-06-22 17:57:31 +03:00 |
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Dmitry Stogov
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082bcf89c9
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Use ir_ctx.fixed_regset to limit available registers
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2022-06-21 16:13:14 +03:00 |
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Dmitry Stogov
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5ef1e97261
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Better support for unreachable basic blocks
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2022-06-20 16:34:44 +03:00 |
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Dmitry Stogov
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ac5c3981e5
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Allow LOOP_BEGIN to have multiple input back-edges
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2022-06-16 12:31:23 +03:00 |
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Dmitry Stogov
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ab220de623
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Fitsr and last instructions of BB and leading PARAM, PHI, PI, VAR instructions don't need to be scheduled.
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2022-05-25 09:43:53 +03:00 |
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Dmitry Stogov
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463002107a
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Rename "gcm_blocks" into "cfg_map"
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2022-05-25 09:33:47 +03:00 |
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Dmitry Stogov
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87e9780a5b
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Fixed handling of constant references
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2022-05-25 09:30:26 +03:00 |
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Dmitry Stogov
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58b67fec18
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Topological sort of nodes in each basic block
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2022-05-24 18:04:38 +03:00 |
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Dmitry Stogov
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04667faf22
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Reorder blocks according to branch probability
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2022-05-24 12:47:39 +03:00 |
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Dmitry Stogov
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2b9e793b4e
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Add debug options
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2022-04-27 14:47:52 +03:00 |
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Dmitry Stogov
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6b60d8fba9
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Code generation for VLOAD and VSTORE
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2022-04-19 22:35:29 +03:00 |
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Dmitry Stogov
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2937993190
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Initial import
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2022-04-06 00:19:23 +03:00 |
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