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386 Commits 2 Branches 0 Tags 3.2 MiB
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97 Commits

Author SHA1 Message Date
Dmitry Stogov
d4cd0d6eba Better interval splitting 2022-09-15 01:50:25 +03:00
Dmitry Stogov
cdc34ae22b Prohibit swapping of operands when the first operand is constant 2022-09-14 14:28:57 +03:00
Dmitry Stogov
76028e8855 Fix compilation warnings 2022-09-05 22:43:27 +03:00
Dmitry Stogov
756a1afc82 Better register allocation support for address and load fusion 2022-09-01 19:19:01 +03:00
Dmitry Stogov
b0cba142a9 Merge ir_uses_fixed_reg() into ir_get_def_flags() and ir_get_use_flags() 2022-08-12 21:17:19 +03:00
Dmitry Stogov
b607a28b2a Fix 2022-08-12 21:01:35 +03:00
Dmitry Stogov
360ca107f4 Replace dirst ir_bitset_union() by ir_bitset_copy() 2022-08-12 19:52:24 +03:00
Dmitry Stogov
d55154d998 Introduce ir_bitqueue API 2022-08-12 19:25:10 +03:00
Dmitry Stogov
9ff5d74778 Introduce ir_bitset_pop_first_ex() and ir_bitset_incl_ex() to avoid repatable checks of the first bitset elements. 2022-08-12 18:01:15 +03:00
Dmitry Stogov
253b99ae74 Eliminate useless ir_bitset_empty() checks 2022-08-11 20:42:03 +03:00
Dmitry Stogov
ca109d3fc9 Use single live interval to handle all scratch registers clobbered by CALL 2022-08-11 19:56:59 +03:00
Dmitry Stogov
1820972a21 Use PHP memory manager 2022-08-10 17:41:14 +03:00
Dmitry Stogov
825d18a5cf Reprder conditions 2022-08-10 15:37:14 +03:00
Dmitry Stogov
8ed4a4d2fa Cleanup "current_range" cache maintenance 2022-08-10 15:24:09 +03:00
Dmitry Stogov
8861c6cf54 Construct unhandled list in backward order to simplify the list sorting 2022-08-10 15:04:01 +03:00
Dmitry Stogov
1ef04d2540 Improve live interval coverage and overlaping tests by checking only the necessary tails of active and inactive intervals. 2022-08-10 13:59:34 +03:00
Dmitry Stogov
89013100c8 Optimize ir_ival_covers() (the list of live ranges is sorted) 2022-08-10 10:38:30 +03:00
Dmitry Stogov
0295c071cf Cache the last ir_live_range.end in ir_live_interval.end 2022-08-10 09:47:06 +03:00
Dmitry Stogov
2148f05392 Initial support for fascall calling convention (incomplete) 2022-06-22 23:59:56 +03:00
Dmitry Stogov
082bcf89c9 Use ir_ctx.fixed_regset to limit available registers 2022-06-21 16:13:14 +03:00
Dmitry Stogov
00e92483bc Fix compilation warnings 2022-06-21 11:41:59 +03:00
Dmitry Stogov
5ef1e97261 Better support for unreachable basic blocks 2022-06-20 16:34:44 +03:00
Dmitry Stogov
5cafe50d36 Initial support for PHP 2022-06-10 00:16:29 +03:00
Dmitry Stogov
3212cd5bd2 Fix compilation warnings 2022-06-07 14:43:35 +03:00
Dmitry Stogov
91bddc09ed Cleanup & unification 2022-06-01 00:34:45 +03:00
Dmitry Stogov
00c300fc9f Start Aarch64 back-end 2022-05-31 11:22:31 +03:00
Dmitry Stogov
41f3e43cf7 cleanup 2022-05-27 13:18:04 +03:00
Dmitry Stogov
3e1816a71f Fix register allocation for ABS_INT 2022-05-27 00:11:31 +03:00
Dmitry Stogov
2840227291 Fixed assertion 2022-05-26 21:44:36 +03:00
Dmitry Stogov
4974c301bc Fix code generation for preserved registers and dessa moves 2022-05-26 18:08:39 +03:00
Dmitry Stogov
e28a3c801e Fix retutn FP numbers for 32-bit x86 back-end 2022-05-26 11:58:51 +03:00
Dmitry Stogov
9215162833 Ger rid of ir_ctx.bb_num and double neaning of ir_ctx.prev_insn_len 2022-05-25 11:58:35 +03:00
Dmitry Stogov
740cac8e2f Move ir_ctx.unused_live_ranges to local variable 2022-05-25 10:57:21 +03:00
Dmitry Stogov
c9bb858e50 Fuse loads without register allocation when this makes sense. 
Make oarameters passed through stack to reuse the same stack slot for spilling.
 2022-05-19 10:53:08 +03:00
Dmitry Stogov
1af065058b Use better name 2022-05-19 09:15:45 +03:00
Dmitry Stogov
e9e214d7d9 Remove special support for "_spill_" variable 2022-05-18 17:32:32 +03:00
Dmitry Stogov
0189eb28d0 Use a kind of "Buddy Allocaor" to pack spill slots of different sizes 2022-05-17 00:17:59 +03:00
Dmitry Stogov
6fb5380906 Take into account spill slot size and alignment 2022-05-16 22:16:29 +03:00
Dmitry Stogov
5f529a9d67 Hint propagation 2022-05-16 11:53:10 +03:00
Dmitry Stogov
e8dd422167 Cleanup "top" usage 2022-05-16 10:19:30 +03:00
Dmitry Stogov
e4e3336b2b Take into account registers used to pass constants 2022-05-13 15:26:11 +03:00
Dmitry Stogov
896ddb9e77 Flexable scratch register constraints (allow MUL %edx) 2022-05-13 15:10:15 +03:00
Dmitry Stogov
3dac541928 LSRA cleanup 2022-05-13 12:14:21 +03:00
Dmitry Stogov
4eaca331b9 Allow using debug_regset in RELEASE build 2022-05-13 09:22:31 +03:00
Dmitry Stogov
cd6eb1354a Renumber virtual registers 2022-05-13 01:15:24 +03:00
Dmitry Stogov
1f673ebfda Better temporary register usage for SSA deconstruction 2022-05-13 00:32:37 +03:00
Dmitry Stogov
386b140265 Refactor Linear Scan Register Allocator to use linked lists instead of bitsets 
This fixes allocation of several temporary variables for single instruction
 2022-05-12 17:43:08 +03:00
Dmitry Stogov
1028d7d330 Fix reading behind array range 2022-05-12 11:04:20 +03:00
Dmitry Stogov
c2d224148b Use prefered register if possible 2022-05-11 21:10:35 +03:00
Dmitry Stogov
69b5a852e5 Make DESSA API use "ir_ref" instead of "virtual register number" 
(0 - is still a temporary register)
 2022-05-06 16:19:57 +03:00