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280 Commits 2 Branches 0 Tags 3.2 MiB
efbc6d6b84
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164 Commits

Author SHA1 Message Date
Dmitry Stogov
efbc6d6b84 Fix address calculation fusion 2022-07-20 22:30:25 +03:00
Dmitry Stogov
3c4135576a Add TRAP instruction 2022-07-20 17:59:44 +03:00
Dmitry Stogov
42df10b3ae Fuse address calculation into store 2022-07-20 17:19:46 +03:00
Dmitry Stogov
4004a9d222 Support for overflow detection 2022-07-20 11:25:53 +03:00
Dmitry Stogov
e1ae79102a Fuse address calulation with the following binary op 2022-07-19 17:53:17 +03:00
Dmitry Stogov
6b92f02a9c AArch64: Fuse address calculation into LDR/STR instructions 2022-06-28 12:24:50 +03:00
Dmitry Stogov
b6605500f0 Improve AArch64 support 2022-06-28 01:43:59 +03:00
Dmitry Stogov
907c22261d Turn IR_TLS into "load" 2022-06-28 00:03:06 +03:00
Dmitry Stogov
fe333adfa1 Add ability to force fix/restore some predefied registers 2022-06-23 22:39:00 +03:00
Dmitry Stogov
c9fa87e6c4 Support for fastcall caling convention. 
(this should be reimplemented through function prototypes)
 2022-06-23 13:14:30 +03:00
Dmitry Stogov
56c8b372a8 Replace ir_insn.emit_const by ir_insn.const_flags 2022-06-23 11:25:47 +03:00
Dmitry Stogov
2148f05392 Initial support for fascall calling convention (incomplete) 2022-06-22 23:59:56 +03:00
Dmitry Stogov
ef3ffff81b Fix CALL/1 copying. Fallback to CALL+RETURN when we can't generate code for TAILCALL. 2022-06-22 17:57:31 +03:00
Dmitry Stogov
a165c43196 Initial support for thread local storage + optimization of some related code selection patterns 2022-06-22 16:02:43 +03:00
Dmitry Stogov
9b25587eb6 Compound assignment instruction fusion 2022-06-21 17:33:57 +03:00
Dmitry Stogov
cb64f578eb Avoid memory allocation for empty arguments list 2022-06-21 13:04:33 +03:00
Dmitry Stogov
00e92483bc Fix compilation warnings 2022-06-21 11:41:59 +03:00
Dmitry Stogov
5ef1e97261 Better support for unreachable basic blocks 2022-06-20 16:34:44 +03:00
Dmitry Stogov
f8a23e9fe4 Don't protect/unprotect external code buffer 2022-06-17 13:22:26 +03:00
Dmitry Stogov
411dd20331 Support for code fragments with multiple entries 2022-06-16 23:49:27 +03:00
Dmitry Stogov
5fb115ab11 Remove LOOP_EXIT 2022-06-15 17:27:31 +03:00
Dmitry Stogov
706850f578 Prevent mov reg to itself 2022-06-15 14:37:16 +03:00
Dmitry Stogov
d877e35909 Fuse load+cmp 2022-06-15 13:15:19 +03:00
Dmitry Stogov
b5a3b2fe90 Load fusion and cmp+guard fusion 2022-06-15 12:27:36 +03:00
Dmitry Stogov
be0ecd0eb8 Fix LOAD/STORE with constant addresses 2022-06-14 22:38:35 +03:00
Dmitry Stogov
0a93d2e41b Fix incorrect type usage 2022-06-14 20:51:39 +03:00
Dmitry Stogov
f841fb6c34 Initial support for guards 2022-06-14 16:27:33 +03:00
Dmitry Stogov
af4558e439 Allow emitting native code into preallocated buffer 2022-06-10 11:30:19 +03:00
Dmitry Stogov
5cafe50d36 Initial support for PHP 2022-06-10 00:16:29 +03:00
Dmitry Stogov
63ec9b4864 iRemove useless (always true) condition 2022-06-07 14:45:57 +03:00
Dmitry Stogov
fbedabc5d8 cleanup 2022-06-07 10:17:41 +03:00
Dmitry Stogov
1108acf9b8 cleanup 2022-06-06 23:12:45 +03:00
Dmitry Stogov
ad052c59ab cleanup 2022-06-06 22:36:11 +03:00
Dmitry Stogov
17797a4a84 cleanup 2022-06-06 18:10:41 +03:00
Dmitry Stogov
f6b81b14e9 Aarch64 back-end 2022-06-06 15:27:25 +03:00
Dmitry Stogov
054a70012e Aarch64 back-end (incomplete) 2022-06-03 12:47:02 +03:00
Dmitry Stogov
30e11861dd Aarch64 back-end (incomplete) 2022-06-03 00:38:49 +03:00
Dmitry Stogov
fb998c9058 Aarch64 back-end (incomplete) 2022-06-02 18:34:47 +03:00
Dmitry Stogov
ab8019e0cd Aarch64 back-end (incomplete) 2022-06-02 15:12:56 +03:00
Dmitry Stogov
bb842b489c Aarch64 backend support & unification 2022-06-01 18:16:32 +03:00
Dmitry Stogov
91bddc09ed Cleanup & unification 2022-06-01 00:34:45 +03:00
Dmitry Stogov
00c300fc9f Start Aarch64 back-end 2022-05-31 11:22:31 +03:00
Dmitry Stogov
a45d40277c Replace xmm(dst-IR_REG_XMM0) by xmm(dst-IR_REG_FP_FIRST) 2022-05-31 10:44:10 +03:00
Dmitry Stogov
ad8248af31 Cleanup 2022-05-31 00:23:04 +03:00
Dmitry Stogov
41f3e43cf7 cleanup 2022-05-27 13:18:04 +03:00
Dmitry Stogov
3e1816a71f Fix register allocation for ABS_INT 2022-05-27 00:11:31 +03:00
Dmitry Stogov
77f7d7e2af SWITCH elated fixes 2022-05-26 20:58:07 +03:00
Dmitry Stogov
4a39bda507 Fix double passing in 32-bit x86 2022-05-26 18:26:37 +03:00
Dmitry Stogov
4974c301bc Fix code generation for preserved registers and dessa moves 2022-05-26 18:08:39 +03:00
Dmitry Stogov
f5bbdeea27 Fix buffer overflow 2022-05-26 17:19:43 +03:00