-  type casting nodes
-  overflow detection nodes 
-  va_arg nodes
+  VADDR to pass VAR by address
-  BSTART, BEND nodes (to free data allocated by ALLOCA)
-  ENTRY node for multy-entry units
-  IJMP
-  guards
-  variable name binding

-  VLOAD, VSTORE -> SSA

?  reassociation folding rules
-  folding engine improvement (one rule for few patterns)

-  irreducable loops detection
-  irreducable loops support

-  range inference and PI node
-  SCCP edge cases
-  Folding after SCCP (see combo4.ir)

-  local scheduling according to data dependencies, register presure and pipeline stalls
-  basic block trace scheduling

?  instruction selection
	- xor, btsl=INCL, btrl=EXCL, btl=IN, bsr, maxss, maxsd, minss, minsd
    - MOVZX to avoid a SHIFT and AND instruction
    - Use CMOVcc to remove branches

?  register allocation
	+  linear scan
		+   allocate scratch registers first
		-	separate INT and FP allocation phases 
    +  use positions
	+  fixed registers constraints
		+  fixed input
		+  fixed output
		+  fixed tmp
		+  fixed intervals for parameters
		+  accurate fixed interval construction
	-  constraints
	    +  result reuses op1
	    -  kill
	    -  restricted regset
	    -  must be in register
	-  temporary registers
	?  spills
		+  spill slot allocation (uniqe for each VREG)
		-  spill slot allocation (packed/aligned according to SpillRange)
	?  splitting
	-  splinting
		-  spill only at cold path if possible	
	?  hints
		+  hints for fixed input/outpu registers
		+  hints for parameter nodes
		+  hints for call arguments
		+  hints for nodes that reuse input (result reuses op1)
		-  hints propagation
		-  hints and low priority

?  code generation
	+  NEG (fp), ABS
	-  OVERFLOW
	-  MIN, MAX, COND
	-  CAST
	+  TAILCALL
	+  VLOAD, VSTORE, VADDR
	?  ALLOCA, LOAD, STORE
	+  SWITCH
	?  ir_last_use
	+  binop_int $imm, mem
	?  commutative insns and swap (binop_int, mul, binop_sse, binop_avx, cmp_int, cmp_fp, cmp_br_int)
	-  temporary register (e.g. for unsupported immediate operand in mul, div, and 64-bit constants)
	?  temporary register for swap (dessa3.ir)
	-  temporary register for spill loads and stores
	+  parallel argument passing
	-  stack arguments and parameters
	-  return merge/split
	?  binary code emission
		+ DynAsm
		- BinAsm
	- 32-bit x86 code

?  disassembler
    -  .rodata section and relative data labels

-  modules (functions, data objecs, import, export, prototypes, forward declarations, memory segments, ref data, expr data) 
-  C compiler
-  interpreter
-  alias analyzes

-  PHP support