ir/tests/debug.x86/memop_006.irt
2022-11-08 11:56:22 +03:00

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--TEST--
006: Memory update (shift)
--TARGET--
x86
--ARGS--
-S
--CODE--
{
l_1 = START(l_5);
int32_t y = PARAM(l_1, "y", 1);
int32_t v = VAR(l_1, "_spill_");
l_2 = VSTORE(l_1, v, y);
int32_t z, l_3 = VLOAD(l_2, v);
int32_t ret = SHL(z, y);
l_4 = VSTORE(l_3, v, ret);
l_5 = RETURN(l_4);
}
--EXPECT--
test:
subl $4, %esp
movl 8(%esp), %ecx
movl %ecx, (%esp)
shll %cl, (%esp)
addl $4, %esp
retl