mirror of
https://github.com/danog/ir.git
synced 2024-11-26 20:34:53 +01:00
706 lines
18 KiB
C
706 lines
18 KiB
C
#include "ir.h"
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#include "ir_private.h"
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int ir_build_cfg(ir_ctx *ctx)
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{
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ir_ref n, j, *p, ref, b;
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ir_insn *insn;
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uint32_t flags;
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ir_worklist worklist;
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uint32_t bb_count = 0;
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uint32_t edges_count = 0;
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ir_block *blocks, *bb;
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uint32_t *_blocks, *edges;
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ir_use_list *use_list;
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_blocks = ir_mem_calloc(ctx->insns_count, sizeof(uint32_t));
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memset(_blocks, 0, ctx->insns_count * sizeof(uint32_t));
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ir_worklist_init(&worklist, ctx->insns_count);
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/* Add START node */
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ir_worklist_push(&worklist, 1);
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/* Add all ENTRY nodes */
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ref = ctx->ir_base[1].op2;
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while (ref) {
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ir_worklist_push(&worklist, ref);
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ref = ctx->ir_base[ref].op2;
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}
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/* Add all "stop" nodes */
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ref = ctx->ir_base[1].op1;
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while (ref) {
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ir_worklist_push(&worklist, ref);
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ref = ctx->ir_base[ref].op3;
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}
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while (ir_worklist_len(&worklist)) {
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ref = ir_worklist_pop(&worklist);
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insn = &ctx->ir_base[ref];
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if (_blocks[ref]) {
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/* alredy processed */
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} else if (IR_IS_BB_END(insn->op)) {
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/* Mark BB end */
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bb_count++;
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_blocks[ref] = bb_count;
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/* Add successors */
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use_list = &ctx->use_lists[ref];
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n = use_list->count;
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for (j = 0, p = &ctx->use_edges[use_list->refs]; j < n; j++, p++) {
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ir_ref ref = *p;
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insn = &ctx->ir_base[ref];
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if (ir_op_flags[insn->op] & IR_OP_FLAG_CONTROL) {
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ir_worklist_push(&worklist, ref);
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}
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}
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/* Skip control nodes untill BB start */
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while (1) {
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insn = &ctx->ir_base[ref];
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if (IR_IS_BB_START(insn->op)) {
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break;
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}
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ref = insn->op1; // follow connected control blocks untill BB start
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}
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/* Mark BB start */
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ir_bitset_incl(worklist.visited, ref);
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_blocks[ref] = bb_count;
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/* Add predecessors */
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flags = ir_op_flags[insn->op];
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n = ir_input_edges_count(ctx, insn);
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for (j = 1, p = insn->ops + 1; j <= n; j++, p++) {
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ir_ref ref = *p;
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if (ref && IR_OPND_KIND(flags, j) == IR_OPND_CONTROL) {
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ir_worklist_push(&worklist, ref);
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}
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}
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} else {
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IR_ASSERT(IR_IS_BB_START(insn->op));
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/* Mark BB start */
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bb_count++;
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_blocks[ref] = bb_count;
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/* Add predecessors */
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flags = ir_op_flags[insn->op];
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n = ir_input_edges_count(ctx, insn);
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for (j = 1, p = insn->ops + 1; j <= n; j++, p++) {
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ir_ref ref = *p;
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if (ref && IR_OPND_KIND(flags, j) == IR_OPND_CONTROL) {
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ir_worklist_push(&worklist, ref);
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}
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}
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/* Skip control nodes untill BB end */
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while (1) {
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use_list = &ctx->use_lists[ref];
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n = use_list->count;
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ref = IR_UNUSED;
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for (j = 0, p = &ctx->use_edges[use_list->refs]; j < n; j++, p++) {
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ref = *p;
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insn = &ctx->ir_base[ref];
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if (ir_op_flags[insn->op] & IR_OP_FLAG_CONTROL) {
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break;
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}
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}
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IR_ASSERT(ref != IR_UNUSED);
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if (IR_IS_BB_END(insn->op)) {
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break;
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}
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}
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/* Mark BB end */
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_blocks[ref] = bb_count;
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ir_bitset_incl(worklist.visited, ref);
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/* Add successors */
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use_list = &ctx->use_lists[ref];
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n = use_list->count;
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for (j = 0, p = &ctx->use_edges[use_list->refs]; j < n; j++, p++) {
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ir_ref ref = *p;
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insn = &ctx->ir_base[ref];
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if (ir_op_flags[insn->op] & IR_OP_FLAG_CONTROL) {
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ir_worklist_push(&worklist, ref);
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}
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}
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}
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}
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if (bb_count == 0) {
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IR_ASSERT(bb_count > 0);
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return 0;
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}
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/* Create array of basic blocks and count succcessor edges for each BB */
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blocks = ir_mem_malloc((bb_count + 1) * sizeof(ir_block));
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memset(blocks, 0, (bb_count + 1) * sizeof(ir_block));
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uint32_t *_xlat = ir_mem_malloc((bb_count + 1) * sizeof(uint32_t));
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memset(_xlat, 0, (bb_count + 1) * sizeof(uint32_t));
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b = 0;
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IR_BITSET_FOREACH(worklist.visited, ir_bitset_len(ctx->insns_count), ref) {
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/* reorder blocks to reflect the original control flow (START - 1) */
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j = _blocks[ref];
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n = _xlat[j];
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if (n == 0) {
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_xlat[j] = n = ++b;
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}
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_blocks[ref] = n;
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bb = &blocks[n];
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insn = &ctx->ir_base[ref];
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if (IR_IS_BB_START(insn->op)) {
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bb->start = ref;
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} else {
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bb->end = ref;
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}
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} IR_BITSET_FOREACH_END();
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ir_mem_free(_xlat);
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ir_worklist_free(&worklist);
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ir_worklist_init(&worklist, bb_count + 1);
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for (b = 1, bb = blocks + 1; b <= bb_count; b++, bb++) {
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insn = &ctx->ir_base[bb->start];
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if (insn->op == IR_START) {
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bb->flags |= IR_BB_START;
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ir_worklist_push(&worklist, b);
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} else if (insn->op == IR_ENTRY) {
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bb->flags |= IR_BB_ENTRY;
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ir_worklist_push(&worklist, b);
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} else {
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bb->flags |= IR_BB_UNREACHABLE; /* all blocks are marked as UNREACHABLE first */
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}
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flags = ir_op_flags[insn->op];
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n = ir_input_edges_count(ctx, insn);
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for (j = 1, p = insn->ops + 1; j <= n; j++, p++) {
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ir_ref pred_ref = *p;
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if (pred_ref) {
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if (IR_OPND_KIND(flags, j) == IR_OPND_CONTROL) {
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bb->predecessors_count++;
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blocks[_blocks[pred_ref]].successors_count++;
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edges_count++;
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}
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}
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}
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}
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bb = blocks + 1;
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n = 0;
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for (b = 1; b <= bb_count; b++, bb++) {
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bb->successors = n;
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n += bb->successors_count;
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bb->successors_count = 0;
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bb->predecessors = n;
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n += bb->predecessors_count;
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bb->predecessors_count = 0;
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}
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IR_ASSERT(n == edges_count * 2);
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/* Create an array of successor control edges */
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edges = ir_mem_malloc(edges_count * 2 * sizeof(uint32_t));
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bb = blocks + 1;
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for (b = 1; b <= bb_count; b++, bb++) {
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insn = &ctx->ir_base[bb->start];
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flags = ir_op_flags[insn->op];
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n = ir_input_edges_count(ctx, insn);
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for (j = 1, p = insn->ops + 1; j <= n; j++, p++) {
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ref = *p;
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if (ref) {
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if (IR_OPND_KIND(flags, j) == IR_OPND_CONTROL) {
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ir_ref pred_b = _blocks[ref];
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ir_block *pred_bb = &blocks[pred_b];
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edges[bb->predecessors + bb->predecessors_count] = pred_b;
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bb->predecessors_count++;
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pred_bb->end = ref;
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edges[pred_bb->successors + pred_bb->successors_count] = b;
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pred_bb->successors_count++;
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}
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}
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}
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}
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ir_mem_free(_blocks);
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ctx->cfg_blocks_count = bb_count;
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ctx->cfg_edges_count = edges_count * 2;
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ctx->cfg_blocks = blocks;
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ctx->cfg_edges = edges;
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/* Mark reachable blocks */
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while (ir_worklist_len(&worklist) != 0) {
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uint32_t *p, succ_b;
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ir_block *succ_bb;
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b = ir_worklist_pop(&worklist);
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bb = &blocks[b];
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n = bb->successors_count;
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for (p = ctx->cfg_edges + bb->successors; n > 0; p++, n--) {
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succ_b = *p;
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succ_bb = &blocks[succ_b];
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if (succ_bb->flags & IR_BB_UNREACHABLE) {
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succ_bb->flags &= ~IR_BB_UNREACHABLE;
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ir_worklist_push(&worklist, succ_b);
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}
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}
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}
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ir_worklist_free(&worklist);
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return 1;
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}
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static void compute_postnum(const ir_ctx *ctx, uint32_t *cur, uint32_t b)
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{
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uint32_t i, *p;
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ir_block *bb = &ctx->cfg_blocks[b];
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if (bb->postnum != 0) {
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return;
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}
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if (bb->successors_count) {
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bb->postnum = -1; /* Marker for "currently visiting" */
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p = ctx->cfg_edges + bb->successors;
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i = bb->successors_count;
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do {
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compute_postnum(ctx, cur, *p);
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p++;
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} while (--i);
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}
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bb->postnum = (*cur)++;
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}
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/* Computes dominator tree using algorithm from "A Simple, Fast Dominance Algorithm" by
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* Cooper, Harvey and Kennedy. */
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int ir_build_dominators_tree(ir_ctx *ctx)
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{
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uint32_t blocks_count, b;
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ir_block *blocks, *bb;
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uint32_t *edges;
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bool changed;
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b = 1;
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compute_postnum(ctx, &b, 1);
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/* Find immediate dominators */
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blocks = ctx->cfg_blocks;
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edges = ctx->cfg_edges;
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blocks_count = ctx->cfg_blocks_count;
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blocks[1].idom = 1;
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do {
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changed = 0;
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/* Iterating in Reverse Post Oorder */
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for (b = 2, bb = &blocks[2]; b <= blocks_count; b++, bb++) {
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if (bb->flags & IR_BB_UNREACHABLE) {
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continue;
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}
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if (bb->predecessors_count) {
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int idom = 0;
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uint32_t k = bb->predecessors_count;
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uint32_t *p = edges + bb->predecessors;
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do {
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uint32_t pred_b = *p;
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ir_block *pred_bb = &blocks[pred_b];
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if (pred_bb->idom > 0) {
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if (idom == 0) {
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idom = pred_b;
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} else if (idom != pred_b) {
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ir_block *idom_bb = &blocks[idom];
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do {
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while (pred_bb->postnum < idom_bb->postnum) {
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pred_b = pred_bb->idom;
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pred_bb = &blocks[pred_b];
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}
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while (idom_bb->postnum < pred_bb->postnum) {
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idom = idom_bb->idom;
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idom_bb = &blocks[idom];
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}
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} while (idom != pred_b);
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}
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}
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p++;
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} while (--k > 0);
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if (idom > 0 && bb->idom != idom) {
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bb->idom = idom;
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changed = 1;
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}
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}
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}
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} while (changed);
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blocks[1].idom = 0;
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blocks[1].dom_depth = 0;
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/* Construct dominators tree */
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for (b = 2, bb = &blocks[2]; b <= blocks_count; b++, bb++) {
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if (bb->flags & IR_BB_UNREACHABLE) {
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continue;
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}
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if (bb->idom > 0) {
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ir_block *idom_bb = &blocks[bb->idom];
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bb->dom_depth = idom_bb->dom_depth + 1;
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/* Sort by block number to traverse children in pre-order */
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if (idom_bb->dom_child == 0) {
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idom_bb->dom_child = b;
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} else if (b < idom_bb->dom_child) {
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bb->dom_next_child = idom_bb->dom_child;
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idom_bb->dom_child = b;
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} else {
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int child = idom_bb->dom_child;
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ir_block *child_bb = &blocks[child];
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while (child_bb->dom_next_child > 0 && b > child_bb->dom_next_child) {
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child = child_bb->dom_next_child;
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child_bb = &blocks[child];
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}
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bb->dom_next_child = child_bb->dom_next_child;
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child_bb->dom_next_child = b;
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}
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}
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}
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return 1;
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}
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static bool ir_dominates(ir_block *blocks, uint32_t b1, uint32_t b2)
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{
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uint32_t b1_depth = blocks[b1].dom_depth;
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ir_block *bb2 = &blocks[b2];
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while (bb2->dom_depth > b1_depth) {
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b2 = bb2->dom_parent;
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bb2 = &blocks[b2];
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}
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return b1 == b2;
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}
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int ir_find_loops(ir_ctx *ctx)
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{
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uint32_t i, j, n, count;
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uint32_t *entry_times, *exit_times, *sorted_blocks, time = 1;
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ir_block *blocks = ctx->cfg_blocks;
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uint32_t *edges = ctx->cfg_edges;
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ir_worklist work;
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/* We don't materialize the DJ spanning tree explicitly, as we are only interested in ancestor
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* queries. These are implemented by checking entry/exit times of the DFS search. */
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ir_worklist_init(&work, ctx->cfg_blocks_count + 1);
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entry_times = ir_mem_calloc((ctx->cfg_blocks_count + 1) * 3, sizeof(uint32_t));
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exit_times = entry_times + ctx->cfg_blocks_count + 1;
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sorted_blocks = exit_times + ctx->cfg_blocks_count + 1;
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ir_worklist_push(&work, 1);
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while (ir_worklist_len(&work)) {
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ir_block *bb;
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int child;
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next:
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i = ir_worklist_peek(&work);
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if (!entry_times[i]) {
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entry_times[i] = time++;
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}
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/* Visit blocks immediately dominated by i. */
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bb = &blocks[i];
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for (child = bb->dom_child; child > 0; child = blocks[child].dom_next_child) {
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if (ir_worklist_push(&work, child)) {
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goto next;
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}
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}
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/* Visit join edges. */
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if (bb->successors_count) {
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uint32_t *p = edges + bb->successors;
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for (j = 0; j < bb->successors_count; j++,p++) {
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uint32_t succ = *p;
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if (blocks[succ].idom == i) {
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continue;
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} else if (ir_worklist_push(&work, succ)) {
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goto next;
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}
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}
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}
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exit_times[i] = time++;
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ir_worklist_pop(&work);
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}
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/* Sort blocks by level, which is the opposite order in which we want to process them */
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sorted_blocks[1] = 1;
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j = 1;
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n = 2;
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while (j != n) {
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i = j;
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j = n;
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for (; i < j; i++) {
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int child;
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for (child = blocks[sorted_blocks[i]].dom_child; child > 0; child = blocks[child].dom_next_child) {
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sorted_blocks[n++] = child;
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}
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}
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}
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count = n;
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/* Identify loops. See Sreedhar et al, "Identifying Loops Using DJ Graphs". */
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while (n > 1) {
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i = sorted_blocks[--n];
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ir_block *bb = &blocks[i];
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if (bb->predecessors_count > 1) {
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bool irreducible = 0;
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uint32_t *p = &edges[bb->predecessors];
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j = bb->predecessors_count;
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do {
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uint32_t pred = *p;
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/* A join edge is one for which the predecessor does not
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immediately dominate the successor. */
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if (bb->idom != pred) {
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/* In a loop back-edge (back-join edge), the successor dominates
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the predecessor. */
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if (ir_dominates(blocks, i, pred)) {
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if (!ir_worklist_len(&work)) {
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ir_bitset_clear(work.visited, ir_bitset_len(ir_worklist_capasity(&work)));
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}
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ir_worklist_push(&work, pred);
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} else {
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/* Otherwise it's a cross-join edge. See if it's a branch
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to an ancestor on the DJ spanning tree. */
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irreducible = (entry_times[pred] > entry_times[i] && exit_times[pred] < exit_times[i]);
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}
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}
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p++;
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} while (--j);
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if (UNEXPECTED(irreducible)) {
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// TODO: Support for irreducible loops ???
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bb->flags |= IR_BB_IRREDUCIBLE_LOOP;
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ctx->flags |= IR_IRREDUCIBLE_CFG;
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while (ir_worklist_len(&work)) {
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ir_worklist_pop(&work);
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}
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} else if (ir_worklist_len(&work)) {
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bb->flags |= IR_BB_LOOP_HEADER;
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while (ir_worklist_len(&work)) {
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j = ir_worklist_pop(&work);
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while (blocks[j].loop_header > 0) {
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j = blocks[j].loop_header;
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}
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if (j != i) {
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ir_block *bb = &blocks[j];
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if (bb->idom < 0 && j != 1) {
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|
/* Ignore blocks that are unreachable or only abnormally reachable. */
|
|
continue;
|
|
}
|
|
bb->loop_header = i;
|
|
if (bb->predecessors_count) {
|
|
uint32_t *p = &edges[bb->predecessors];
|
|
j = bb->predecessors_count;
|
|
do {
|
|
ir_worklist_push(&work, *p);
|
|
p++;
|
|
} while (--j);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
for (n = 1; n < count; n++) {
|
|
i = sorted_blocks[n];
|
|
ir_block *bb = &blocks[i];
|
|
if (bb->loop_header > 0) {
|
|
bb->loop_depth = blocks[bb->loop_header].loop_depth;
|
|
}
|
|
if (bb->flags & IR_BB_LOOP_HEADER) {
|
|
bb->loop_depth++;
|
|
}
|
|
}
|
|
|
|
ir_mem_free(entry_times);
|
|
ir_worklist_free(&work);
|
|
|
|
return 1;
|
|
}
|
|
|
|
/* A variation of "Top-down Positioning" algorithm described by
|
|
* Karl Pettis and Robert C. Hansen "Profile Guided Code Positioning"
|
|
*
|
|
* TODO: Switch to "Bottom-up Positioning" algorithm
|
|
*/
|
|
int ir_schedule_blocks(ir_ctx *ctx)
|
|
{
|
|
uint32_t len = ir_bitset_len(ctx->cfg_blocks_count + 1);
|
|
ir_bitset blocks = ir_bitset_malloc(ctx->cfg_blocks_count + 1);
|
|
uint32_t b, *p, successor, best_successor, j;
|
|
ir_block *bb, *successor_bb, *best_successor_bb;
|
|
ir_insn *insn;
|
|
uint32_t *list, *map;
|
|
uint32_t prob, best_successor_prob;
|
|
uint32_t count = 0;
|
|
bool reorder = 0;
|
|
|
|
list = ir_mem_malloc(sizeof(uint32_t) * (ctx->cfg_blocks_count + 1) * 2);
|
|
map = list + (ctx->cfg_blocks_count + 1);
|
|
for (b = 1; b <= ctx->cfg_blocks_count; b++) {
|
|
ir_bitset_incl(blocks, b);
|
|
}
|
|
|
|
while (!ir_bitset_empty(blocks, len)) {
|
|
b = ir_bitset_pop_first(blocks, len);
|
|
bb = &ctx->cfg_blocks[b];
|
|
do {
|
|
if (bb->predecessors_count == 2) {
|
|
uint32_t predecessor = ctx->cfg_edges[bb->predecessors];
|
|
|
|
if (!ir_bitset_in(blocks, predecessor)) {
|
|
predecessor = ctx->cfg_edges[bb->predecessors + 1];
|
|
}
|
|
if (ir_bitset_in(blocks, predecessor)) {
|
|
ir_block *predecessor_bb = &ctx->cfg_blocks[predecessor];
|
|
|
|
if (predecessor_bb->successors_count == 1
|
|
&& predecessor_bb->predecessors_count == 1
|
|
&& predecessor_bb->end == predecessor_bb->start + 1
|
|
&& !(predecessor_bb->flags & IR_BB_DESSA_MOVES)) {
|
|
ir_bitset_excl(blocks, predecessor);
|
|
count++;
|
|
list[count] = predecessor;
|
|
map[predecessor] = count;
|
|
if (predecessor != count) {
|
|
reorder = 1;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
count++;
|
|
list[count] = b;
|
|
map[b] = count;
|
|
if (b != count) {
|
|
reorder = 1;
|
|
}
|
|
if (!bb->successors_count) {
|
|
break;
|
|
}
|
|
best_successor_bb = NULL;
|
|
for (b = 0, p = &ctx->cfg_edges[bb->successors]; b < bb->successors_count; b++, p++) {
|
|
successor = *p;
|
|
if (ir_bitset_in(blocks, successor)) {
|
|
successor_bb = &ctx->cfg_blocks[successor];
|
|
insn = &ctx->ir_base[successor_bb->start];
|
|
if (insn->op == IR_IF_TRUE || insn->op == IR_IF_FALSE || insn->op == IR_CASE_DEFAULT) {
|
|
prob = insn->op2;
|
|
} else if (insn->op == IR_CASE_VAL) {
|
|
prob = insn->op3;
|
|
} else {
|
|
prob = 0;
|
|
}
|
|
if (!best_successor_bb
|
|
|| successor_bb->loop_depth > best_successor_bb->loop_depth) {
|
|
// TODO: use block frequency
|
|
best_successor = successor;
|
|
best_successor_bb = successor_bb;
|
|
best_successor_prob = prob;
|
|
} else if ((best_successor_prob && prob && prob > best_successor_prob)
|
|
|| (!best_successor_prob && prob && prob > 100 / bb->successors_count)
|
|
|| (best_successor_prob && !prob && best_successor_prob < 100 / bb->successors_count)) {
|
|
best_successor = successor;
|
|
best_successor_bb = successor_bb;
|
|
best_successor_prob = prob;
|
|
}
|
|
}
|
|
}
|
|
if (!best_successor_bb) {
|
|
if (bb->successors_count == 1
|
|
&& bb->predecessors_count == 1
|
|
&& bb->end == bb->start + 1
|
|
&& !(bb->flags & IR_BB_DESSA_MOVES)) {
|
|
uint32_t predecessor = ctx->cfg_edges[bb->predecessors];
|
|
ir_block *predecessor_bb = &ctx->cfg_blocks[predecessor];
|
|
|
|
if (predecessor_bb->successors_count == 2) {
|
|
b = ctx->cfg_edges[predecessor_bb->successors];
|
|
|
|
if (!ir_bitset_in(blocks, b)) {
|
|
b = ctx->cfg_edges[predecessor_bb->successors + 1];
|
|
}
|
|
if (ir_bitset_in(blocks, b)) {
|
|
bb = &ctx->cfg_blocks[b];
|
|
ir_bitset_excl(blocks, b);
|
|
continue;
|
|
}
|
|
}
|
|
}
|
|
break;
|
|
}
|
|
b = best_successor;
|
|
bb = best_successor_bb;
|
|
ir_bitset_excl(blocks, b);
|
|
} while (1);
|
|
}
|
|
|
|
if (reorder) {
|
|
ir_block *cfg_blocks = ir_mem_calloc(sizeof(ir_block), ctx->cfg_blocks_count + 1);
|
|
|
|
for (b = 1, bb = cfg_blocks + 1; b <= count; b++, bb++) {
|
|
*bb = ctx->cfg_blocks[list[b]];
|
|
if (bb->dom_parent > 0) {
|
|
bb->dom_parent = map[bb->dom_parent];
|
|
}
|
|
if (bb->dom_child > 0) {
|
|
bb->dom_child = map[bb->dom_child];
|
|
}
|
|
if (bb->dom_next_child > 0) {
|
|
bb->dom_next_child = map[bb->dom_next_child];
|
|
}
|
|
if (bb->loop_header > 0) {
|
|
bb->loop_header = map[bb->loop_header];
|
|
}
|
|
}
|
|
for (j = 0; j < ctx->cfg_edges_count; j++) {
|
|
if (ctx->cfg_edges[j] > 0) {
|
|
ctx->cfg_edges[j] = map[ctx->cfg_edges[j]];
|
|
}
|
|
}
|
|
ir_mem_free(ctx->cfg_blocks);
|
|
ctx->cfg_blocks = cfg_blocks;
|
|
}
|
|
|
|
ir_mem_free(list);
|
|
ir_mem_free(blocks);
|
|
|
|
return 1;
|
|
}
|
|
|
|
/* JMP target optimisation */
|
|
int ir_skip_empty_blocks(ir_ctx *ctx, int b)
|
|
{
|
|
while (ctx->cfg_blocks[b].flags & IR_BB_MAY_SKIP) {
|
|
b++;
|
|
}
|
|
return b;
|
|
}
|
|
|
|
void ir_get_true_false_blocks(ir_ctx *ctx, int b, int *true_block, int *false_block, int *next_block)
|
|
{
|
|
ir_block *bb;
|
|
uint32_t n, *p, use_block;
|
|
ir_insn *use_insn;
|
|
|
|
*true_block = 0;
|
|
*false_block = 0;
|
|
bb = &ctx->cfg_blocks[b];
|
|
IR_ASSERT(ctx->ir_base[bb->end].op == IR_IF);
|
|
IR_ASSERT(bb->successors_count == 2);
|
|
p = &ctx->cfg_edges[bb->successors];
|
|
for (n = 2; n != 0; p++, n--) {
|
|
use_block = *p;
|
|
use_insn = &ctx->ir_base[ctx->cfg_blocks[use_block].start];
|
|
if (use_insn->op == IR_IF_TRUE) {
|
|
*true_block = ir_skip_empty_blocks(ctx, use_block);
|
|
} else if (use_insn->op == IR_IF_FALSE) {
|
|
*false_block = ir_skip_empty_blocks(ctx, use_block);
|
|
} else {
|
|
IR_ASSERT(0);
|
|
}
|
|
}
|
|
IR_ASSERT(*true_block && *false_block);
|
|
*next_block = b == ctx->cfg_blocks_count ? 0 : ir_skip_empty_blocks(ctx, b + 1);
|
|
}
|