Dmitry Stogov b560ddc8f6 Added test		2023-05-29 17:11:26 +03:00
..
abs_001.irt
abs_002.irt
add_001.irt
bswap_001.irt
cond_01.irt
conv_001.irt	Add type conversion nodes (no code generation yet)	2022-05-20 01:01:48 +03:00
conv_002.irt	Add type conversion nodes (no code generation yet)	2022-05-20 01:01:48 +03:00
conv_003.irt	Improve type conversion nodes	2022-05-20 09:00:13 +03:00
conv_004.irt	Improve type conversion nodes	2022-05-20 09:00:13 +03:00
conv_005.irt	Improve type conversion nodes	2022-05-20 09:00:13 +03:00
conv_006.irt	Improve type conversion nodes	2022-05-20 09:00:13 +03:00
conv_007.irt	Improve type conversion nodes	2022-05-20 09:00:13 +03:00
conv_008.irt	Implement code generation for type conversion instructions	2022-05-20 13:07:41 +03:00
conv_009.irt	Implement code generation for type conversion instructions	2022-05-20 13:07:41 +03:00
conv_010.irt	Improve type conversion nodes	2022-05-20 09:00:13 +03:00
conv_011.irt	Add test for TRUNC	2022-05-20 09:09:52 +03:00
dessa_001.irt	Reimplement JMP optimization	2022-08-30 23:15:20 +03:00
dessa_002.irt	Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.	2023-03-23 00:47:27 +03:00
dessa_003.irt	Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.	2023-03-23 00:47:27 +03:00
div_001.irt
eq_001.irt
ge_001.irt
gt_001.irt
ijmp_001.irt	Implement IJMP instruction (indirect jump or computed goto)	2022-05-19 18:56:48 +03:00
le_001.irt
lt_001.irt
max_01.irt
min_01.irt
mod_001.irt
mul_001.irt
ne_001.irt
neg_001.irt
not_001.irt
not_002.irt
rol_001.irt
ror_001.irt
sar_001.irt
sar_002.irt
shl_001.irt
shr_001.irt
shr_002.irt
sub_001.irt
switch_001.irt	Fixed GH Issue #41 (ir_emit_c() dumping misses BB label)	2023-05-29 13:58:32 +03:00
switch_002.irt	Added test	2023-05-29 17:11:26 +03:00
uge_001.irt
ugt_001.irt
ule_001.irt
ult_001.irt