ir/tests/debug/memop_003.irt
2022-05-25 17:38:22 +03:00

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--TEST--
003: Memory update (binary op with reg + swap)
--TARGET--
x86_64
--ARGS--
-S
--CODE--
{
int32_t c = 0x80;
l_1 = START(l_5);
int32_t y = PARAM(l_1, "y", 1);
int32_t v = VAR(l_1, "_spill_");
l_2 = VSTORE(l_1, v, y);
int32_t z, l_3 = VLOAD(l_2, v);
int32_t y2 = ADD(y, 2);
int32_t ret = AND(y2, z);
l_4 = VSTORE(l_3, v, ret);
l_5 = RETURN(l_4);
}
--EXPECT--
test:
subq $8, %rsp
movl %edi, (%rsp)
leal (%rdi, %rdi), %eax
andl %eax, (%rsp)
addq $8, %rsp
retq