ir/tests/017.irt
2022-04-06 00:19:23 +03:00

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--TEST--
017: Schedule & Long multislot instructions
--CODE--
{
uintptr_t c_1 = 0;
bool c_2 = 0;
bool c_3 = 1;
int32_t c_4 = 1;
int32_t c_5 = 2;
int32_t c_6 = 3;
int32_t c_7 = 4;
l_1 = START(l_16);
int32_t d_2 = PARAM(l_1, "x", 0);
l_3 = SWITCH(l_1, d_2);
l_4 = CASE_VAL(l_3, c_4);
l_5 = END(l_4);
l_6 = CASE_VAL(l_3, c_5);
l_7 = END(l_6);
l_8 = CASE_VAL(l_3, c_6);
l_9 = END(l_8);
l_10 = CASE_DEFAULT(l_3);
l_11 = END(l_10);
l_12 = MERGE/4(l_5, l_7, l_9, l_11);
int32_t d_14 = PHI/4(l_12, c_4, c_5, c_6, c_7);
l_16 = RETURN(l_12, d_14);
}
--EXPECT--
{
uintptr_t c_1 = 0;
bool c_2 = 0;
bool c_3 = 1;
int32_t c_4 = 1;
int32_t c_5 = 2;
int32_t c_6 = 3;
int32_t c_7 = 4;
l_1 = START(l_16);
int32_t d_2 = PARAM(l_1, "x", 0);
l_3 = SWITCH(l_1, d_2);
l_4 = CASE_VAL(l_3, c_4);
l_5 = END(l_4);
l_6 = CASE_VAL(l_3, c_5);
l_7 = END(l_6);
l_8 = CASE_VAL(l_3, c_6);
l_9 = END(l_8);
l_10 = CASE_DEFAULT(l_3);
l_11 = END(l_10);
l_12 = MERGE/4(l_5, l_7, l_9, l_11);
int32_t d_14 = PHI/4(l_12, c_4, c_5, c_6, c_7);
l_16 = RETURN(l_12, d_14);
}