ir/TODO
2023-04-14 10:45:56 +03:00

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- va_arg nodes
? BSTART, BEND nodes (to free data allocated by ALLOCA) (now it's possible to do this through AFREE)
- Full support for function prototypes ???
(now we may only set "fastcall" calling convention for constants or for variables through BITCAST)
- VLOAD, VSTORE -> SSA
? reassociation folding rules
- folding engine improvement (one rule for few patterns)
- irreducable loops detection/support
- Extend SCCP to support range inference and PI node
- See "Eliminating Range Checks using SSA Form" John Gough, Herbert Klaeren
- PI nodes may be defined as %dst = BOUND_LOW/HIGH(%ctrl, %src, %low/high_bound)
- PI nodes may be inserted after IF and GUARD
- PI should not be lifted to BB with PHIs
? instruction selection
- btsl=INCL, btrl=EXCL, btl=IN, bsr
- MOVZX to avoid a SHIFT and AND instruction
- BURS ???
? register allocation
- hints and low priority registers (prevent allocating registers that are used as hints
tests/x86/ra_015.irt, tests/x86/combo_004.irt tests/x86/min_005.ir, tests/x86/min_006.irt, tests/x86/abs_001.irt)
- optimisation of spill code placement (BB local or through resolution)
- separate INT and FP allocation phases (for performance)
- tests/x86/ra_007.irt loads one of the parameters too early that leads to the following useless move
- Try to avoid live-interval construction, see "Efficient Global Register Allocation" Ian Rogers
? code generation
- COND
- TAILCALL with stack arguments (tests/x86/tailcall_001.itr)
- 32-bit x86 back-end 64-bit integers support
(add_009.irt, conv_001.irt, conv_002.irt, conv_004.irt, conv_010.irt, sub_009.irt)
- binary code emission without DynAsm ???
- modules (functions, data objecs, import, export, prototypes, forward declarations, memory segments, ref data, expr data)
- C front-end
- interpreter
- alias analyzes