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https://github.com/danog/ir.git
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c9fa8dfebd
Previously we performed parallel copy for virtual registers, now we do the same for the target CPU registers.
157 lines
2.7 KiB
Plaintext
157 lines
2.7 KiB
Plaintext
--TEST--
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Fib2
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--TARGET--
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aarch64
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--ARGS--
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--debug-regset 0x3ffffffff --save --dump-live-ranges -S --run
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--CODE--
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{
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int32_t zero = 0;
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double c_0 = 0;
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double c_1 = 1;
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double c_10000 = 10000;
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uintptr_t f = func(printf);
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uintptr_t format = "%g\n";
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l_1 = START(l_6);
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double lo_1 = COPY(c_0);
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double hi_1 = COPY(c_1);
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l_2 = END(l_1);
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l_3 = LOOP_BEGIN(l_2, l_9);
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double lo_2 = PHI(l_3, lo_1, lo_3);
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double hi_2 = PHI(l_3, hi_1, hi_3);
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bool b = LT(hi_2, c_10000);
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l_4 = IF(l_3, b);
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l_7 = IF_TRUE(l_4);
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double hi_3 = ADD(hi_2, lo_2);
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double lo_3 = SUB(hi_3, lo_2);
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ll = CALL/2(l_7, f, format, lo_3);
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l_8 = CALL/2(ll, f, format, lo_3);
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l_9 = LOOP_END(l_8);
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l_5 = IF_FALSE(l_4);
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l_6 = RETURN(l_5, zero);
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}
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--EXPECT--
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{
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uintptr_t c_1 = 0;
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bool c_2 = 0;
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bool c_3 = 1;
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int32_t c_4 = 0;
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double c_5 = 0;
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double c_6 = 1;
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double c_7 = 10000;
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uintptr_t c_8 = func(printf);
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uintptr_t c_9 = "%g\n";
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l_1 = START(l_17);
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l_2 = END(l_1);
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l_3 = LOOP_BEGIN(l_2, l_15);
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double d_4 = PHI(l_3, c_5, d_10);
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double d_5 = PHI(l_3, c_6, d_9);
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bool d_6 = LT(d_5, c_7);
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l_7 = IF(l_3, d_6);
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l_8 = IF_TRUE(l_7);
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double d_9 = ADD(d_5, d_4);
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double d_10 = SUB(d_9, d_4);
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l_11 = CALL/2(l_8, c_8, c_9, d_10);
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l_13 = CALL/2(l_11, c_8, c_9, d_10);
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l_15 = LOOP_END(l_13);
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l_16 = IF_FALSE(l_7);
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l_17 = RETURN(l_16, c_4);
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}
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{ # LIVE-RANGES (vregs_count=2)
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TMP
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[%d0]: [2.2-2.3)/1
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[%d0]: [7.0-7.2)/6.2
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R1 (d_4, d_10) [SPILL=0x0]
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[%d0]: [3.0-7.0), DEF(4.2)
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: [7.0-8.0)
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[%d0]: [8.0-10.1), [10.2-11.0), USE(9.1/2)!, USE(10.1/2)!, DEF(10.2)!, USE(11.0/4, hint=%d0)
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: [11.0-16.0), USE(13.0/4, hint=%d0), PHI_USE(15.2, phi=d_4/3)
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R2 (d_5, d_9) [SPILL=0x8]
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[%d1]: [3.0-9.1), [9.2-10.1), DEF(5.2), USE(7.1/6.1)!, USE(9.1/1)!, DEF(9.2)!, USE(10.1/1)!
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: [10.1-16.0), PHI_USE(15.2, phi=d_5/3)
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[%x0] : [11.0-11.1), [13.0-13.1), [17.0-17.1)
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[%d0] : [11.0-11.1), [13.0-13.1)
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[%SCRATCH] : [11.1-11.2), [13.1-13.2)
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}
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test:
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stp x29, x30, [sp, #-0x20]!
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mov x29, sp
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fmov d0, xzr
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str d0, [x29, #0x10]
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ldr d1, .L3
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str d1, [x29, #0x18]
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.L1:
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ldr d0, .L4
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ldr d1, [x29, #0x18]
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fcmp d0, d1
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b.ls .L2
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ldr d1, [x29, #0x18]
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ldr d0, [x29, #0x10]
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fadd d1, d1, d0
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str d1, [x29, #0x18]
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ldr d1, [x29, #0x18]
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ldr d0, [x29, #0x10]
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fsub d0, d1, d0
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str d0, [x29, #0x10]
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ldr d0, [x29, #0x10]
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adr x0, .L5
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bl _IO_printf
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adr x0, .L5
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ldr d0, [x29, #0x10]
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bl _IO_printf
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b .L1
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.L2:
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mov w0, wzr
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ldp x29, x30, [sp], #0x20
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ret
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.rodata
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.L3:
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.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x3f
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.L4:
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.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x88, 0xc3, 0x40
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.L5:
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.db 0x25, 0x67, 0x0a, 0x00
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1
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1
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1
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1
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2
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2
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3
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3
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5
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5
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8
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8
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13
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13
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21
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21
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34
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34
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55
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55
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89
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89
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144
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144
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233
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233
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377
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377
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610
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610
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987
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987
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1597
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1597
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2584
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2584
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4181
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4181
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6765
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6765
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exit code = 0
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