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24 lines
383 B
Plaintext
24 lines
383 B
Plaintext
--TEST--
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015: Register Allocation (SHL + SHL + reuse/vreg hint)
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--TARGET--
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x86_64
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--ARGS--
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-S
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--CODE--
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{
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l_1 = START(l_4);
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uint32_t x = PARAM(l_1, "x", 1);
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uint32_t y = PARAM(l_1, "y", 2);
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uint32_t ret = SHL(x, y);
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uint32_t ret2 = SHL(y, ret);
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l_4 = RETURN(l_1, ret2);
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}
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--EXPECT--
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test:
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movl %esi, %ecx
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shll %cl, %edi
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movl %edi, %ecx
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movl %esi, %eax
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shll %cl, %eax
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retq
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