ir/tests/debug.aarch64/dce_001.irt
2022-11-08 11:56:22 +03:00

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--TEST--
DCE 001
--TARGET--
aarch64
--ARGS--
-S
--CODE--
{
uintptr_t c_1 = 0;
bool c_2 = 0;
bool c_3 = 1;
int32_t c_4 = 10;
int32_t c_5 = 2;
int32_t c_6 = 1;
int32_t c_7 = 0;
l_1 = START(l_16);
int32_t d_2 = PARAM(l_1, "x", 0);
l_3 = END(l_1);
l_4 = LOOP_BEGIN(l_3, l_12);
int32_t d_5 = PHI(l_4, c_7, d_7);
int32_t d_6 = ADD(d_2, c_6);
int32_t d_7 = ADD(d_6, d_5);
int32_t d_8 = MUL(d_7, c_5);
int32_t xxx = DIV(d_8, c_4);
bool d_9 = LT(d_7, c_4);
l_10 = IF(l_4, d_9);
l_11 = IF_TRUE(l_10);
l_12 = LOOP_END(l_11, l_4);
l_13 = IF_FALSE(l_10);
l_16 = RETURN(l_13, d_8);
}
--EXPECT--
test:
add w0, w0, #1
mov w1, wzr
.L1:
add w1, w0, w1
cmp w1, #0xa
b.lt .L1
add w0, w1, w1
ret